Datasheet

2.10.2.2. High Impedance Mode
In High Impedance mode, the voltage regulator is disabled and its output pin (VREG_VOUT) is set to a high impedance
state. In this mode, the regulator’s power consumption is minimised. This mode allows a load connected to
VREG_VOUT to be powered from a power source other than the on-chip regulator. This could allow, for example, the
load to be initially powered from the on-chip voltage regulator, and then switched to an external regulator under
software control. The external regulator would also need to support a high impedance mode, with only one regulator
supplying the load at a time. The supply voltage is maintained by the regulator’s output capacitor during the brief period
when both regulators are in high impedance mode.
2.10.2.3. Shutdown Mode
In Shutdown mode, the voltage regulator is disabled, power consumption is minimized and the regulator’s output pin
(VREG_VOUT) is pulled to 0V.
Shutdown mode is only useful if the voltage regulator is not providing the RP2040’s digital core supply (DVDD). If the
regulator is supplying DVDD, and brown-out detection is enabled, entering shutdown mode will cause a reset event and
the voltage regulator will return to normal mode. If brown-out detection isn’t enabled, the voltage regulator will shut
down and will remain in shutdown mode until its input supply (VREG_VIN) is power cycled.
2.10.3. Output Voltage Select
The required output voltage can be selected by writing to the VSEL field in the VREG register. The voltage regulator’s
output voltage can be set in the range 0.80V to 1.30V in 50mV intervals. The regulator output voltage is set to 1.1V at
initial power-on or following a reset event. For details, see the VREG register description.
Note that RP2040 may not operate reliably with its digital core supply (DVDD) at a voltage other than 1.1V.
2.10.4. Status
The VREG register contains a single status field, ROK, which indicates whether the voltage regulator’s output is being
correctly regulated.
At power on, ROK remains low until the regulator has started up and the output voltage reaches the ROK assertion
threshold (ROK
TH.ASSERT
). It then remains high until the voltage drops below the ROK deassertion threshold (ROK
TH.DEASSERT
),
remaining low until the output voltage is above the assertion threshold again. ROK
TH.ASSERT
is nominally 90% of the selected
output voltage, 0.99V if the selected output voltage is 1.1V, and ROK
TH.DEASSERT
is nominally 87% of the selected output
voltage, 0.957V if the selected output voltage is 1.1V.
Note that adjusting the output voltage to a higher voltage will cause ROK to go low until the assertion threshold for the
higher voltage is reached. ROK will also go low if the regulator is placed in high impedance mode.
2.10.5. Current Limit
The voltage regulator includes a current limit to prevent the load current exceeding the maximum rated value. The
output voltage will not be regulated and will drop below the selected value when the current limit is active.
2.10.6. List of Registers
The voltage regulator shares a register address space with the chip-level reset subsystem. The registers for both
subsystems are listed here. Only, the VREG register is part of the voltage register subsystem. The BOD and CHIP_RESET
registers are part of the chip-level reset subsystem. The shared address space is referred to as vreg_and_chip_reset
elsewhere in this document.
The VREG_AND_CHIP_RESET registers start at a base address of 0x40064000 (defined as VREG_AND_CHIP_RESET_BASE
RP2040 Datasheet
2.10. Core Supply Regulator 184