Datasheet

To update part of an IO register, without a read-modify-write sequence, the best solution on RP2040 is atomic
set/clear/XOR (see Section 2.1.2). Note that this is more flexible than byte or halfword writes, as any combination of
fields can be updated in one operation.
Upon a 8-bit or 16-bit write (such as a strb instruction on the Cortex-M0+), an IO register will sample the entire 32-bit
write databus. The Cortex-M0+ and DMA on RP2040 will always replicate narrow data across the bus:
Pico Examples: https://github.com/raspberrypi/pico-examples/tree/master/system/narrow_io_write/narrow_io_write.c Lines 19 - 60
19 int main() {
20 stdio_init_all();
21
22 // We'll use WATCHDOG_SCRATCH0 as a convenient 32 bit read/write register
23 // that we can assign arbitrary values to
24 io_rw_32 *scratch32 = &watchdog_hw->scratch[0];
25 // Alias the scratch register as two halfwords at offsets +0x0 and +0x2
26 volatile uint16_t *scratch16 = (volatile uint16_t *) scratch32;
27 // Alias the scratch register as four bytes at offsets +0x0, +0x1, +0x2, +0x3:
28 volatile uint8_t *scratch8 = (volatile uint8_t *) scratch32;
29
30 // Show that we can read/write the scratch register as normal:
31 printf("Writing 32 bit value\n");
32 *scratch32 = 0xdeadbeef;
33 printf("Should be 0xdeadbeef: 0x%08x\n", *scratch32);
34
35 // We can do narrow reads just fine -- IO registers treat this as a 32 bit
36 // read, and the processor/DMA will pick out the correct byte lanes based
37 // on transfer size and address LSBs
38 printf("\nReading back 1 byte at a time\n");
39 // Little-endian!
40 printf("Should be ef be ad de: %02x %02x %02x %02x\n",
41 scratch8[0], scratch8[1], scratch8[2], scratch8[3]);
42
43 // The Cortex-M0+ and the RP2040 DMA replicate byte writes across the bus,
44 // and IO registers will sample the entire write bus always.
45 printf("\nWriting 8 bit value 0xa5 at offset 0\n");
46 scratch8[0] = 0xa5;
47 // Read back the whole scratch register in one go
48 printf("Should be 0xa5a5a5a5: 0x%08x\n", *scratch32);
49
50 // The IO register ignores the address LSBs [1:0] as well as the transfer
51 // size, so it doesn't matter what byte offset we use
52 printf("\nWriting 8 bit value at offset 1\n");
53 scratch8[1] = 0x3c;
54 printf("Should be 0x3c3c3c3c: 0x%08x\n", *scratch32);
55
56 // Halfword writes are also replicated across the write data bus
57 printf("\nWriting 16 bit value at offset 0\n");
58 scratch16[0] = 0xf00d;
59 printf("Should be 0xf00df00d: 0x%08x\n", *scratch32);
60 }
2.1.5. List of Registers
The Bus Fabric registers start at a base address of 0x40030000 (defined as BUSCTRL_BASE in SDK).
Table 4. List of
BUSCTRL registers
Offset Name Info
0x00 BUS_PRIORITY Set the priority of each master for bus arbitration.
RP2040 Datasheet
2.1. Bus Fabric 19