Datasheet

Table Of Contents
Bits Name Description Type Reset
30 CLK_SYS_SRAM2 RW 0x1
29 CLK_SYS_SRAM1 RW 0x1
28 CLK_SYS_SRAM0 RW 0x1
27 CLK_SYS_SPI1 RW 0x1
26 CLK_PERI_SPI1 RW 0x1
25 CLK_SYS_SPI0 RW 0x1
24 CLK_PERI_SPI0 RW 0x1
23 CLK_SYS_SIO RW 0x1
22 CLK_SYS_RTC RW 0x1
21 CLK_RTC_RTC RW 0x1
20 CLK_SYS_ROSC RW 0x1
19 CLK_SYS_ROM RW 0x1
18 CLK_SYS_RESETS RW 0x1
17 CLK_SYS_PWM RW 0x1
16 CLK_SYS_PSM RW 0x1
15 CLK_SYS_PLL_USB RW 0x1
14 CLK_SYS_PLL_SYS RW 0x1
13 CLK_SYS_PIO1 RW 0x1
12 CLK_SYS_PIO0 RW 0x1
11 CLK_SYS_PADS RW 0x1
10 CLK_SYS_VREG_AND_CHIP_RESET RW 0x1
9 CLK_SYS_JTAG RW 0x1
8 CLK_SYS_IO RW 0x1
7 CLK_SYS_I2C1 RW 0x1
6 CLK_SYS_I2C0 RW 0x1
5 CLK_SYS_DMA RW 0x1
4 CLK_SYS_BUSFABRIC RW 0x1
3 CLK_SYS_BUSCTRL RW 0x1
2 CLK_SYS_ADC RW 0x1
1 CLK_ADC_ADC RW 0x1
0 CLK_SYS_CLOCKS RW 0x1
CLOCKS: SLEEP_EN1 Register
Offset: 0xac
Description
enable clock in sleep mode
RP2040 Datasheet
2.15. Clocks 236