Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
19 io_rw_32 startup;
20 io_rw_32 _reserved[3];
21 io_rw_32 count;
22 } xosc_hw_t;
23
24 #define xosc_hw ((xosc_hw_t *const)XOSC_BASE)
SDK: https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/hardware_xosc/xosc.c Lines 27 - 39
27 void xosc_init(void) {
28 // Assumes 1-15 MHz input, checked above.
29 xosc_hw->ctrl = XOSC_CTRL_FREQ_RANGE_VALUE_1_15MHZ;
30
31 // Set xosc startup delay
32 xosc_hw->startup = STARTUP_DELAY;
33
34 // Set the enable bit now that we have set freq range and startup delay
35 hw_set_bits(&xosc_hw->ctrl, XOSC_CTRL_ENABLE_VALUE_ENABLE << XOSC_CTRL_ENABLE_LSB);
36
37 // Wait for XOSC to be stable
38 while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS));
39 }
2.16.7. List of Registers
The XOSC registers start at a base address of 0x40024000 (defined as XOSC_BASE in SDK).
Table 268. List of
XOSC registers
Offset Name Info
0x00 CTRL Crystal Oscillator Control
0x04 STATUS Crystal Oscillator Status
0x08 DORMANT Crystal Oscillator pause control
0x0c STARTUP Controls the startup delay
0x1c COUNT A down counter running at the XOSC frequency which counts to
zero and stops.
XOSC: CTRL Register
Offset: 0x00
Description
Crystal Oscillator Control
Table 269. CTRL
Register
Bits Name Description Type Reset
31:24 Reserved. - - -
RP2040 Datasheet
2.16. Crystal Oscillator (XOSC) 242