Datasheet

to shorten the ROSC loop, the bypassed stages still propagate the signal and therefore their drive strengths must be set
to at least the same level as the lowest drive strength in the stages that are in the loop. This will not affect the
oscillation frequency.
2.17.4. ROSC divider
The ROSC frequency is too fast to be used directly so is divided in an integer divider controlled by the DIV register. DIV
can be changed while the ROSC is running, the output clock will change frequency without glitching. The default divisor
is 16 which ensures the output clock is in the range 1.8 to 12MHz on chip startup.
The divider has 2 outputs, rosc_clksrc and rosc_clksrc_ph, the second being a phase shifted version of the first. This is
primarily intended for use during product development and the outputs will be identical if the PHASE register is left in its
default state.
2.17.5. Random Number Generator
If the system clocks are running from the XOSC and/or PLLs the ROSC can be used to generate random numbers.
Simply enable the ROSC and read the RANDOMBIT register to get a 1-bit random number and read it n times to get an n-
bit value. This does not meet the requirements of randomness for security systems because it can be compromised,
but it may be useful in less critical applications. If the cores are running from the ROSC then the value will not be
random because the timing of the register read will be correlated to the phase of the ROSC.
2.17.6. ROSC Counter
The COUNT register provides a method of managing short software delays. Writing a value to the COUNT register
automatically triggers it to start counting down to zero at the ROSC frequency. The programmer then simply polls the
register until it reaches zero. This is preferable to using NOPs in software loops because it is independent of the core
clock frequency, the compiler and the execution time of the compiled code.
2.17.7. DORMANT mode
In DORMANT mode (see Section 2.11.3) all of the on-chip clocks can be paused to save power. This is particularly
useful in battery-powered applications. The RP2040 is woken from DORMANT mode by an interrupt either from an
external event such as an edge on a GPIO pin or from the on-chip RTC. This must be configured before entering
DORMANT mode. If the RTC is being used to trigger wake-up then it must be clocked from an external source. To enter
DORMANT mode the programmer must then switch all internal clocks to be driven from XOSC or ROSC and stop the
PLLs. Then a specific 32-bit value must be written to the DORMANT register in the chosen oscillator (XOSC or ROSC) to
stop it oscillating. When exiting DORMANT mode the chosen oscillator will restart. If XOSC is chosen then the frequency
will be more precise but the restart time is longer due to the startup delay (>1ms on the RP2040 reference design (see
Hardware design with RP2040, Minimal Design Example)). If ROSC is chosen then the frequency is less precise but the
start-up time is very short (approximately 1μs).
Pico Extras: https://github.com/raspberrypi/pico-extras/tree/master/src/rp2_common/hardware_rosc/rosc.c Lines 56 - 61
56 void rosc_set_dormant(void) {
57 // WARNING: This stops the rosc until woken up by an irq
58 rosc_write(&rosc_hw->dormant, ROSC_DORMANT_VALUE_DORMANT);
59 // Wait for it to become stable once woken up
60 while(!(rosc_hw->status & ROSC_STATUS_STABLE_BITS));
61 }
RP2040 Datasheet
2.17. Ring Oscillator (ROSC) 246