Datasheet

3.2.3.1. Output Shift Register (OSR)
Figure 40. Output Shift
Register (OSR). Data is
parcelled out 1…32
bits at a time, and
unused data is
recycled by a
bidirectional shifter.
Once empty, the OSR
is reloaded from the
TX FIFO.
The Output Shift Register (OSR) holds and shifts output data, between the TX FIFO and the pins (or other destinations,
such as the scratch registers).
•
PULL instructions: remove a 32-bit word from the TX FIFO and place into the OSR.
•
OUT instructions shift data from the OSR to other destinations, 1…32 bits at a time.
•
The OSR fills with zeroes as data is shifted out
•
The state machine will automatically refill the OSR from the FIFO on an OUT instruction, once some total shift count
threshold is reached, if autopull is enabled
•
Shift direction can be left/right, configurable by the processor via configuration registers
For example, to stream data through the FIFO and output to the pins at a rate of one byte per two clocks:
1 .program pull_example1
2 loop:
3 out pins, 8
4 public entry_point:
5 pull
6 out pins, 8 [1]
7 out pins, 8 [1]
8 out pins, 8
9 jmp loop
Autopull (see Section 3.5.4) allows the hardware to automatically refill the OSR in the majority of cases, with the state
machine stalling if it tries to OUT from an empty OSR. This has two benefits:
•
No instructions spent on explicitly pulling from FIFO at the right time
•
Higher throughput: can output up to 32 bits on every single clock cycle, if the FIFO stays topped up
After configuring autopull, the above program can be simplified to the following, which behaves identically:
1 .program pull_example2
2
3 loop:
4 out pins, 8
5 public entry_point:
6 jmp loop
Program wrapping (Section 3.5.2) allows further simplification and, if desired, an output of 1 byte every system clock
cycle.
1 .program pull_example3
2
3 public entry_point:
4 .wrap_target
5 out pins, 8 [1]
RP2040 Datasheet
3.2. Programmer’s Model 334