Datasheet

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Source:
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000: PINS (Uses same pin mapping as IN)
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001: X
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010: Y
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011: NULL
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100: Reserved
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101: STATUS
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110: ISR
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111: OSR
MOV PC causes an unconditional jump. MOV EXEC has the same behaviour as OUT EXEC (Section 3.4.5), and allows register
contents to be executed as an instruction. The MOV itself executes in 1 cycle, and the instruction in Source on the next
cycle. Delay cycles on MOV EXEC are ignored, but the executee may insert delay cycles as normal.
The STATUS source has a value of all-ones or all-zeroes, depending on some state machine status such as FIFO
full/empty, configured by EXECCTRL_STATUS_SEL.
MOV can manipulate the transferred data in limited ways, specified by the Operation argument. Invert sets each bit in
Destination to the logical NOT of the corresponding bit in Source, i.e. 1 bits become 0 bits, and vice versa. Bit reverse sets
each bit n in Destination to bit 31 - n in Source, assuming the bits are numbered 0 to 31.
3.4.8.3. Assembler Syntax
mov <destination>, ( op ) <source>
where:
<destination> Is one of the destinations specified above.
<op> If present, is:
! or ~ for NOT (Note: this is always a bitwise NOT)
:: for bit reverse
<source> Is one of the sources specified above.
3.4.9. IRQ
3.4.9.1. Encoding
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IRQ
1 1 0 Delay/side-set 0 Clr Wait Index
3.4.9.2. Operation
Set or clear the IRQ flag selected by Index argument.
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Clear: if 1, clear the flag selected by Index, instead of raising it. If Clear is set, the Wait bit has no effect.
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Wait: if 1, halt until the raised flag is lowered again, e.g. if a system interrupt handler has acknowledged the flag.
RP2040 Datasheet
3.4. Instruction Set 348