Datasheet

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001: X (scratch register X) 5 LSBs are set to Data, all others cleared to 0.
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010: Y (scratch register Y) 5 LSBs are set to Data, all others cleared to 0.
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011: Reserved
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100: PINDIRS
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101: Reserved
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110: Reserved
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111: Reserved
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Data: 5-bit immediate value to drive to pins or register.
This can be used to assert control signals such as a clock or chip select, or to initialise loop counters. As Data is 5 bits in
size, scratch registers can be SET to values from 0-31, which is sufficient for a 32-iteration loop.
The mapping of SET and OUT onto pins is configured independently. They may be mapped to distinct locations, for
example if one pin is to be used as a clock signal, and another for data. They may also be overlapping ranges of pins: a
UART transmitter might use SET to assert start and stop bits, and OUT instructions to shift out FIFO data to the same pins.
3.4.10.3. Assembler Syntax
set <destination>, <value>
where:
<destination> Is one of the destinations specified above.
<value> The value (see Section 3.3.2) to set (valid range 0-31)
3.5. Functional Details
3.5.1. Side-set
Side-set is a feature that allows state machines to change the level or direction of up to 5 pins, concurrently with the
main execution of the instruction.
One example where this is necessary is a fast SPI interface: here a clock transition (toggling 1→0 or 0→1) must be
simultaneous with a data transition, where a new data bit is shifted from the OSR to a GPIO. In this case an OUT with a
side-set would achieve both of these at once.
This makes the timing of the interface more precise, reduces the overall program size (as a separate SET instruction is
not needed to toggle the clock pin), and also increases the maximum frequency the SPI can run at.
Side-set also makes GPIO mapping much more flexible, as its mapping is independent from SET. The example I2C code
allows SDA and SCL to be mapped to any two arbitrary pins, if clock stretching is disabled. Normally, SCL toggles to
synchronise data transfer, and SDA contains the data bits being shifted out. However, some particular I2C sequences
such as Start and Stop line conditions, need a fixed pattern to be driven on SDA as well as SCL. The mapping I2C uses to
achieve this is:
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Side-set → SCL
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OUT → SDA
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SET → SDA
This lets the state machine serve the two use cases of data on SDA and clock on SCL, or fixed transitions on both SDA
and SCL, while still allowing SDA and SCL to be mapped to any two GPIOs of choice.
RP2040 Datasheet
3.5. Functional Details 350