Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
60 ;
61 ; The IN mapping and the JMP pin select must both be mapped to the GPIO used for
62 ; RX data. Autopush must be enabled.
63
64 public start:
65 initial_high: ; Find rising edge at start of bit period
66 wait 1 pin, 0 [11] ; Delay to eye of second half-period (i.e 3/4 of way
67 jmp pin high_0 ; through bit) and branch on RX pin high/low.
68 high_1:
69 in x, 1 ; Second transition detected (a `1` data symbol)
70 jmp initial_high
71 high_0:
72 in y, 1 [1] ; Line still high, no centre transition (data is `0`)
73 ; Fall-through
74
75 .wrap_target
76 initial_low: ; Find falling edge at start of bit period
77 wait 0 pin, 0 [11] ; Delay to eye of second half-period
78 jmp pin low_1
79 low_0:
80 in y, 1 ; Line still low, no centre transition (data is `0`)
81 jmp initial_high
82 low_1: ; Second transition detected (data is `1`)
83 in x, 1 [1]
84 .wrap
This code assumes that X and Y have the values 1 and 0, respectively. This is arranged for by the included C helper
function:
Pico Examples: https://github.com/raspberrypi/pico-examples/tree/master/pio/differential_manchester/differential_manchester.pio Lines 87 - 103
Ê87 static inline void differential_manchester_rx_program_init(PIO pio, uint sm, uint offset,
Ê uint pin, float div) {
Ê88 pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, false);
Ê89 pio_gpio_init(pio, pin);
Ê90
Ê91 pio_sm_config c = differential_manchester_rx_program_get_default_config(offset);
Ê92 sm_config_set_in_pins(&c, pin); // for WAIT
Ê93 sm_config_set_jmp_pin(&c, pin); // for JMP
Ê94 sm_config_set_in_shift(&c, true, true, 32);
Ê95 sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_RX);
Ê96 sm_config_set_clkdiv(&c, div);
Ê97 pio_sm_init(pio, sm, offset, &c);
Ê98
Ê99 // X and Y are set to 0 and 1, to conveniently emit these to ISR/FIFO.
100 pio_sm_exec(pio, sm, pio_encode_set(pio_x, 1));
101 pio_sm_exec(pio, sm, pio_encode_set(pio_y, 0));
102 pio_sm_set_enabled(pio, sm, true);
103 }
All the pieces now exist to loopback some serial data over a wire between two GPIOs.
Pico Examples: https://github.com/raspberrypi/pico-examples/tree/master/pio/differential_manchester/differential_manchester.c Lines 1 - 43
Ê1 /**
Ê2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
Ê3 *
Ê4 * SPDX-License-Identifier: BSD-3-Clause
Ê5 */
Ê6
RP2040 Datasheet
3.6. Examples 378