Datasheet

3.6.10. Further Examples
The Raspberry Pi Pico C/C++ SDK book has a PIO chapter which goes into depth on some software-centric topics not
presented here. It includes a PIO + DMA logic analyser example that can sample every GPIO on every cycle (a bandwidth
of nearly 4 Gb/s at 125 MHz, although this does fill up RP2040’s RAM quite quickly).
There are also further examples in the pio/ directory in the Pico Examples repository.
Some of the more experimental example code, such as DPI and SD card support, is currently located in the Pico Extras
and Pico Playground repositories. The PIO parts of these are functional, but the surrounding software stacks are still in
an experimental state.
3.7. List of Registers
The PIO0 and PIO1 registers start at base addresses of 0x50200000 and 0x50300000 respectively (defined as PIO0_BASE
and PIO1_BASE in SDK).
Table 377. List of PIO
registers
Offset Name Info
0x000 CTRL PIO control register
0x004 FSTAT FIFO status register
0x008 FDEBUG FIFO debug register
0x00c FLEVEL FIFO levels
0x010 TXF0 Direct write access to the TX FIFO for this state machine. Each
write pushes one word to the FIFO. Attempting to write to a full
FIFO has no effect on the FIFO state or contents, and sets the
sticky FDEBUG_TXOVER error flag for this FIFO.
0x014 TXF1 Direct write access to the TX FIFO for this state machine. Each
write pushes one word to the FIFO. Attempting to write to a full
FIFO has no effect on the FIFO state or contents, and sets the
sticky FDEBUG_TXOVER error flag for this FIFO.
0x018 TXF2 Direct write access to the TX FIFO for this state machine. Each
write pushes one word to the FIFO. Attempting to write to a full
FIFO has no effect on the FIFO state or contents, and sets the
sticky FDEBUG_TXOVER error flag for this FIFO.
0x01c TXF3 Direct write access to the TX FIFO for this state machine. Each
write pushes one word to the FIFO. Attempting to write to a full
FIFO has no effect on the FIFO state or contents, and sets the
sticky FDEBUG_TXOVER error flag for this FIFO.
0x020 RXF0 Direct read access to the RX FIFO for this state machine. Each
read pops one word from the FIFO. Attempting to read from an
empty FIFO has no effect on the FIFO state, and sets the sticky
FDEBUG_RXUNDER error flag for this FIFO. The data returned to
the system on a read from an empty FIFO is undefined.
0x024 RXF1 Direct read access to the RX FIFO for this state machine. Each
read pops one word from the FIFO. Attempting to read from an
empty FIFO has no effect on the FIFO state, and sets the sticky
FDEBUG_RXUNDER error flag for this FIFO. The data returned to
the system on a read from an empty FIFO is undefined.
RP2040 Datasheet
3.7. List of Registers 387