Datasheet

Bits Name Description Type Reset
27:24 TXEMPTY State machine TX FIFO is empty RO 0xf
23:20 Reserved. - - -
19:16 TXFULL State machine TX FIFO is full RO 0x0
15:12 Reserved. - - -
11:8 RXEMPTY State machine RX FIFO is empty RO 0xf
7:4 Reserved. - - -
3:0 RXFULL State machine RX FIFO is full RO 0x0
PIO: FDEBUG Register
Offset: 0x008
Description
FIFO debug register
Table 380. FDEBUG
Register
Bits Name Description Type Reset
31:28 Reserved. - - -
27:24 TXSTALL State machine has stalled on empty TX FIFO during a
blocking PULL, or an OUT with autopull enabled. Write 1 to
clear.
WC 0x0
23:20 Reserved. - - -
19:16 TXOVER TX FIFO overflow (i.e. write-on-full by the system) has
occurred. Write 1 to clear. Note that write-on-full does not
alter the state or contents of the FIFO in any way, but the
data that the system attempted to write is dropped, so if
this flag is set, your software has quite likely dropped
some data on the floor.
WC 0x0
15:12 Reserved. - - -
11:8 RXUNDER RX FIFO underflow (i.e. read-on-empty by the system) has
occurred. Write 1 to clear. Note that read-on-empty does
not perturb the state of the FIFO in any way, but the data
returned by reading from an empty FIFO is undefined, so
this flag generally only becomes set due to some kind of
software error.
WC 0x0
7:4 Reserved. - - -
3:0 RXSTALL State machine has stalled on full RX FIFO during a
blocking PUSH, or an IN with autopush enabled. This flag
is also set when a nonblocking PUSH to a full FIFO took
place, in which case the state machine has dropped data.
Write 1 to clear.
WC 0x0
PIO: FLEVEL Register
Offset: 0x00c
Description
FIFO levels
RP2040 Datasheet
3.7. List of Registers 392