Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
162 cfg = interp_default_config();
163 interp_config_set_shift(&cfg, uv_fractional_bits - 8);
164 interp_config_set_signed(&cfg, true);
165 interp_config_set_cross_input(&cfg, true); // signed blending
166 interp_set_config(interp0, 1, &cfg);
167
168 int16_t samples[] = {0, 10, -20, -1000, 500};
169
170 // step is 1/4 in our fractional representation
171 uint step = (1 << uv_fractional_bits) / 4;
172
173 interp0->accum[0] = 0; // initial sample_offset;
174 interp0->base[2] = (uintptr_t) samples;
175 for (int i = 0; i < 16; i++) {
176 // result2 = samples + (lane0 raw result)
177 // i.e. ptr to the first of two samples to blend between
178 int16_t *sample_pair = (int16_t *) interp0->peek[2];
179 interp0->base[0] = sample_pair[0];
180 interp0->base[1] = sample_pair[1];
181 printf("%d\t(%d%% between %d and %d)\n", (int) interp0->peek[1],
182 100 * (interp0->add_raw[1] & 0xff) / 0xff,
183 sample_pair[0], sample_pair[1]);
184 interp0->add_raw[0] = step;
185 }
186 }
This should print:
0 (0% between 0 and 10)
2 (25% between 0 and 10)
5 (50% between 0 and 10)
7 (75% between 0 and 10)
10 (0% between 10 and -20)
2 (25% between 10 and -20)
-5 (50% between 10 and -20)
-13 (75% between 10 and -20)
-20 (0% between -20 and -1000)
-265 (25% between -20 and -1000)
-510 (50% between -20 and -1000)
-755 (75% between -20 and -1000)
-1000 (0% between -1000 and 500)
-625 (25% between -1000 and 500)
-250 (50% between -1000 and 500)
125 (75% between -1000 and 500)
This method is used for fast approximate audio upscaling in the SDK
2.3.1.6.5. Sample Use Case: Simple Affine Texture Mapping
Simple affine texture mapping can be implemented by using fixed point arithmetic for texture coordinates, and stepping
a fixed amount in each coordinate for every pixel in a scanline. The integer part of the texture coordinates are used to
form an address within the texture to lookup a pixel colour.
By using two lanes, all three base values and the CTRL_LANEx_ADD_RAW flag, it is possible to reduce what would be quite an
expensive CPU operation to a single cycle iteration using the interpolator.
RP2040 Datasheet
2.3. Processor subsystem 40