Datasheet

Bits Name Description Type Reset
20 EP10_IN WC 0x0
19 EP9_OUT WC 0x0
18 EP9_IN WC 0x0
17 EP8_OUT WC 0x0
16 EP8_IN WC 0x0
15 EP7_OUT WC 0x0
14 EP7_IN WC 0x0
13 EP6_OUT WC 0x0
12 EP6_IN WC 0x0
11 EP5_OUT WC 0x0
10 EP5_IN WC 0x0
9 EP4_OUT WC 0x0
8 EP4_IN WC 0x0
7 EP3_OUT WC 0x0
6 EP3_IN WC 0x0
5 EP2_OUT WC 0x0
4 EP2_IN WC 0x0
3 EP1_OUT WC 0x0
2 EP1_IN WC 0x0
1 EP0_OUT WC 0x0
0 EP0_IN WC 0x0
USB: BUFF_CPU_SHOULD_HANDLE Register
Offset: 0x5c
Description
Which of the double buffers should be handled. Only valid if using an interrupt per buffer (i.e. not per 2 buffers). Not
valid for host interrupt endpoint polling because they are only single buffered.
Table 417.
BUFF_CPU_SHOULD_H
ANDLE Register
Bits Name Description Type Reset
31 EP15_OUT RO 0x0
30 EP15_IN RO 0x0
29 EP14_OUT RO 0x0
28 EP14_IN RO 0x0
27 EP13_OUT RO 0x0
26 EP13_IN RO 0x0
25 EP12_OUT RO 0x0
24 EP12_IN RO 0x0
23 EP11_OUT RO 0x0
RP2040 Datasheet
4.1. USB 423