Datasheet

Offset Name Info
0x0d4 INTERP1_POP_LANE0 Read LANE0 result, and simultaneously write lane results to both
accumulators (POP).
0x0d8 INTERP1_POP_LANE1 Read LANE1 result, and simultaneously write lane results to both
accumulators (POP).
0x0dc INTERP1_POP_FULL Read FULL result, and simultaneously write lane results to both
accumulators (POP).
0x0e0 INTERP1_PEEK_LANE0 Read LANE0 result, without altering any internal state (PEEK).
0x0e4 INTERP1_PEEK_LANE1 Read LANE1 result, without altering any internal state (PEEK).
0x0e8 INTERP1_PEEK_FULL Read FULL result, without altering any internal state (PEEK).
0x0ec INTERP1_CTRL_LANE0 Control register for lane 0
0x0f0 INTERP1_CTRL_LANE1 Control register for lane 1
0x0f4 INTERP1_ACCUM0_ADD Values written here are atomically added to ACCUM0
0x0f8 INTERP1_ACCUM1_ADD Values written here are atomically added to ACCUM1
0x0fc INTERP1_BASE_1AND0 On write, the lower 16 bits go to BASE0, upper bits to BASE1
simultaneously.
0x100 SPINLOCK0 Spinlock register 0
0x104 SPINLOCK1 Spinlock register 1
0x108 SPINLOCK2 Spinlock register 2
0x10c SPINLOCK3 Spinlock register 3
0x110 SPINLOCK4 Spinlock register 4
0x114 SPINLOCK5 Spinlock register 5
0x118 SPINLOCK6 Spinlock register 6
0x11c SPINLOCK7 Spinlock register 7
0x120 SPINLOCK8 Spinlock register 8
0x124 SPINLOCK9 Spinlock register 9
0x128 SPINLOCK10 Spinlock register 10
0x12c SPINLOCK11 Spinlock register 11
0x130 SPINLOCK12 Spinlock register 12
0x134 SPINLOCK13 Spinlock register 13
0x138 SPINLOCK14 Spinlock register 14
0x13c SPINLOCK15 Spinlock register 15
0x140 SPINLOCK16 Spinlock register 16
0x144 SPINLOCK17 Spinlock register 17
0x148 SPINLOCK18 Spinlock register 18
0x14c SPINLOCK19 Spinlock register 19
0x150 SPINLOCK20 Spinlock register 20
0x154 SPINLOCK21 Spinlock register 21
RP2040 Datasheet
2.3. Processor subsystem 44