Datasheet

Table Of Contents
Bits Name Description Type Reset
11 SPECIAL This bit indicates whether software performs a Device-ID
or General Call or START BYTE command. - 0: ignore bit
10 GC_OR_START and use IC_TAR normally - 1: perform
special I2C command as specified in Device_ID or
GC_OR_START bit Reset value: 0x0
0x0 Disables programming of GENERAL_CALL or
START_BYTE transmission
0x1 Enables programming of GENERAL_CALL or
START_BYTE transmission
RW 0x0
10 GC_OR_START If bit 11 (SPECIAL) is set to 1 and bit 13(Device-ID) is set
to 0, then this bit indicates whether a General Call or
START byte command is to be performed by the
DW_apb_i2c. - 0: General Call Address - after issuing a
General Call, only writes may be performed. Attempting to
issue a read command results in setting bit 6 (TX_ABRT)
of the IC_RAW_INTR_STAT register. The DW_apb_i2c
remains in General Call mode until the SPECIAL bit value
(bit 11) is cleared. - 1: START BYTE Reset value: 0x0
0x0 GENERAL_CALL byte transmission
0x1 START byte transmission
RW 0x0
9:0 IC_TAR This is the target address for any master transaction.
When transmitting a General Call, these bits are ignored.
To generate a START BYTE, the CPU needs to write only
once into these bits.
If the IC_TAR and IC_SAR are the same, loopback exists
but the FIFOs are shared between master and slave, so full
loopback is not feasible. Only one direction loopback
mode is supported (simplex), not duplex. A master cannot
transmit to itself; it can transmit to only a slave.
RW 0x055
I2C: IC_SAR Register
Offset: 0x08
Description
I2C Slave Address Register
RP2040 Datasheet
4.3. I2C 489