Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
Bits Name Description Type Reset
10 R_START_DET See IC_RAW_INTR_STAT for a detailed description of
R_START_DET bit.
Reset value: 0x0
0x0 → R_START_DET interrupt is inactive
0x1 → R_START_DET interrupt is active
RO 0x0
9 R_STOP_DET See IC_RAW_INTR_STAT for a detailed description of
R_STOP_DET bit.
Reset value: 0x0
0x0 → R_STOP_DET interrupt is inactive
0x1 → R_STOP_DET interrupt is active
RO 0x0
8 R_ACTIVITY See IC_RAW_INTR_STAT for a detailed description of
R_ACTIVITY bit.
Reset value: 0x0
0x0 → R_ACTIVITY interrupt is inactive
0x1 → R_ACTIVITY interrupt is active
RO 0x0
7 R_RX_DONE See IC_RAW_INTR_STAT for a detailed description of
R_RX_DONE bit.
Reset value: 0x0
0x0 → R_RX_DONE interrupt is inactive
0x1 → R_RX_DONE interrupt is active
RO 0x0
6 R_TX_ABRT See IC_RAW_INTR_STAT for a detailed description of
R_TX_ABRT bit.
Reset value: 0x0
0x0 → R_TX_ABRT interrupt is inactive
0x1 → R_TX_ABRT interrupt is active
RO 0x0
5 R_RD_REQ See IC_RAW_INTR_STAT for a detailed description of
R_RD_REQ bit.
Reset value: 0x0
0x0 → R_RD_REQ interrupt is inactive
0x1 → R_RD_REQ interrupt is active
RO 0x0
4 R_TX_EMPTY See IC_RAW_INTR_STAT for a detailed description of
R_TX_EMPTY bit.
Reset value: 0x0
0x0 → R_TX_EMPTY interrupt is inactive
0x1 → R_TX_EMPTY interrupt is active
RO 0x0
3 R_TX_OVER See IC_RAW_INTR_STAT for a detailed description of
R_TX_OVER bit.
Reset value: 0x0
0x0 → R_TX_OVER interrupt is inactive
0x1 → R_TX_OVER interrupt is active
RO 0x0
RP2040 Datasheet
4.3. I2C 496