Datasheet

Table Of Contents
Bits Name Description Type Reset
11 ABRT_MASTER_DI
S
This field indicates that the User tries to initiate a Master
operation with the Master mode disabled.
Reset value: 0x0
Role of DW_apb_i2c: Master-Transmitter or Master-
Receiver
0x0 User initiating master operation when MASTER
disabled- scenario not present
0x1 User initiating master operation when MASTER
disabled
RO 0x0
10 ABRT_10B_RD_N
ORSTRT
This field indicates that the restart is disabled
(IC_RESTART_EN bit (IC_CON[5]) =0) and the master
sends a read command in 10-bit addressing mode.
Reset value: 0x0
Role of DW_apb_i2c: Master-Receiver
0x0 Master not trying to read in 10Bit addressing mode
when RESTART disabled
0x1 Master trying to read in 10Bit addressing mode
when RESTART disabled
RO 0x0
9 ABRT_SBYTE_NO
RSTRT
To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT
must be fixed first; restart must be enabled (IC_CON[5]=1),
the SPECIAL bit must be cleared (IC_TAR[11]), or the
GC_OR_START bit must be cleared (IC_TAR[10]). Once the
source of the ABRT_SBYTE_NORSTRT is fixed, then this
bit can be cleared in the same manner as other bits in this
register. If the source of the ABRT_SBYTE_NORSTRT is
not fixed before attempting to clear this bit, bit 9 clears for
one cycle and then gets reasserted. When this field is set
to 1, the restart is disabled (IC_RESTART_EN bit
(IC_CON[5]) =0) and the user is trying to send a START
Byte.
Reset value: 0x0
Role of DW_apb_i2c: Master
0x0 User trying to send START byte when RESTART
disabled- scenario not present
0x1 User trying to send START byte when RESTART
disabled
RO 0x0
RP2040 Datasheet
4.3. I2C 513