Datasheet

Bits Name Description Type Reset
3 ABRT_TXDATA_N
OACK
This field indicates the master-mode only bit. When the
master receives an acknowledgement for the address, but
when it sends data byte(s) following the address, it did not
receive an acknowledge from the remote slave(s).
Reset value: 0x0
Role of DW_apb_i2c: Master-Transmitter
0x0 → Transmitted data non-ACKed by addressed slave-
scenario not present
0x1 → Transmitted data not ACKed by addressed slave
RO 0x0
2 ABRT_10ADDR2_
NOACK
This field indicates that the Master is in 10-bit address
mode and that the second address byte of the 10-bit
address was not acknowledged by any slave.
Reset value: 0x0
Role of DW_apb_i2c: Master-Transmitter or Master-
Receiver
0x0 → This abort is not generated
0x1 → Byte 2 of 10Bit Address not ACKed by any slave
RO 0x0
1 ABRT_10ADDR1_
NOACK
This field indicates that the Master is in 10-bit address
mode and the first 10-bit address byte was not
acknowledged by any slave.
Reset value: 0x0
Role of DW_apb_i2c: Master-Transmitter or Master-
Receiver
0x0 → This abort is not generated
0x1 → Byte 1 of 10Bit Address not ACKed by any slave
RO 0x0
0 ABRT_7B_ADDR_
NOACK
This field indicates that the Master is in 7-bit addressing
mode and the address sent was not acknowledged by any
slave.
Reset value: 0x0
Role of DW_apb_i2c: Master-Transmitter or Master-
Receiver
0x0 → This abort is not generated
0x1 → This abort is generated because of NOACK for 7-bit
address
RO 0x0
I2C: IC_SLV_DATA_NACK_ONLY Register
Offset: 0x84
Description
Generate Slave Data NACK Register
The register is used to generate a NACK for the data part of a transfer when DW_apb_i2c is acting as a slave-receiver.
This register only exists when the IC_SLV_DATA_NACK_ONLY parameter is set to 1. When this parameter disabled, this
register does not exist and writing to the register’s address has no effect.
RP2040 Datasheet
4.3. I2C 515