Datasheet

Offset Name Info
0x34 CH2_CC Counter compare values
0x38 CH2_TOP Counter wrap value
0x3c CH3_CSR Control and status register
0x40 CH3_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x44 CH3_CTR Direct access to the PWM counter
0x48 CH3_CC Counter compare values
0x4c CH3_TOP Counter wrap value
0x50 CH4_CSR Control and status register
0x54 CH4_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x58 CH4_CTR Direct access to the PWM counter
0x5c CH4_CC Counter compare values
0x60 CH4_TOP Counter wrap value
0x64 CH5_CSR Control and status register
0x68 CH5_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x6c CH5_CTR Direct access to the PWM counter
0x70 CH5_CC Counter compare values
0x74 CH5_TOP Counter wrap value
0x78 CH6_CSR Control and status register
0x7c CH6_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x80 CH6_CTR Direct access to the PWM counter
0x84 CH6_CC Counter compare values
0x88 CH6_TOP Counter wrap value
0x8c CH7_CSR Control and status register
0x90 CH7_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x94 CH7_CTR Direct access to the PWM counter
0x98 CH7_CC Counter compare values
0x9c CH7_TOP Counter wrap value
RP2040 Datasheet
4.5. PWM 551