Datasheet

Bits Name Description Type Reset
2 CH2 RW 0x0
1 CH1 RW 0x0
0 CH0 RW 0x0
PWM: INTR Register
Offset: 0xa4
Description
Raw Interrupts
Table 533. INTR
Register
Bits Name Description Type Reset
31:8 Reserved. - - -
7 CH7 WC 0x0
6 CH6 WC 0x0
5 CH5 WC 0x0
4 CH4 WC 0x0
3 CH3 WC 0x0
2 CH2 WC 0x0
1 CH1 WC 0x0
0 CH0 WC 0x0
PWM: INTE Register
Offset: 0xa8
Description
Interrupt Enable
Table 534. INTE
Register
Bits Name Description Type Reset
31:8 Reserved. - - -
7 CH7 RW 0x0
6 CH6 RW 0x0
5 CH5 RW 0x0
4 CH4 RW 0x0
3 CH3 RW 0x0
2 CH2 RW 0x0
1 CH1 RW 0x0
0 CH0 RW 0x0
PWM: INTF Register
Offset: 0xac
RP2040 Datasheet
4.5. PWM 554