Datasheet

The RTC does not check that the programmed values are in range. Illegal values may cause unexpected behaviour.
4.8.1.1. Day of the week
Day of the week is encoded as Sun 0, Mon 1, …, Sat 6 (i.e. ISO8601 mod 7).
There is no built-in calendar function. The RTC will not compute the correct day of the week; it will only increment the
existing value.
4.8.2. Leap year
If the current value of YEAR in SETUP_0 is evenly divisible by 4, a leap year is detected, and Feb 28th is followed by Feb
29th instead of March 1st. Since this is not always true (century years for example), the leap year checking can be
forced off by setting CTRL.FORCE_NOTLEAPYEAR.

NOTE
The leap year check is done only when needed (the second following Feb 28, 23:59:59). The software can set
FORCE_NOTLEAPYEAR anytime after 2096 Mar 1 00:00:00 as long as it arrives before 2100 Feb 28 23:59:59 (i.e. taking
into account the clock domain crossing latency)
4.8.3. Interrupts
The RTC can generate an interrupt at a configured time. There is a global bit, MATCH_ENA in IRQ_SETUP_0 to enable this
feature, and individual enables for each time field (year, month, day, day-of-the-week, hour, minute, second). The
individual enables can be used to implement repeating interrupts at specified times.
The alarm interrupt is sent to the processors and also to the ROSC and XOSC to wake them from dormant mode. See
Section 4.8.5.5 for more information on dormant mode.
4.8.4. Reference clock
The RTC uses a reference clock clk_rtc, which should be any integer frequency in the range 1…65536 Hz.
The internal 1Hz reference is created by an internal clock divider which divides clk_rtc by an integer value. The divide
value minus 1 is set in CLKDIV_M1.

WARNING
While it is possible to change CLKDIV_M1 while the RTC is enabled, it is not recommended.
clk_rtc can be driven either from an internal or external clock source. Those sources can be prescaled, using a
fractional divider (see Section 2.15).
Examples of possible clock sources include:
•
XOSC @ 12MHz / 256 = 46875Hz. To get a 1Hz reference CLKDIV_M1 should be set to 46874.
•
An external reference from a GPS, which generates one pulse per second. Configure clk_rtc to run from the GPIN0
clock source from GPIO pin 20. In this case, the clk_rtc divider is 1 and the internal RTC clock divider is also 1 (i.e.
CLKDIV_M1 = 0).
RP2040 Datasheet
4.8. RTC 570