Datasheet

Bits Name Description Type Reset
9 ERR The most recent ADC conversion encountered an error;
result is undefined or noisy.
RO 0x0
8 READY 1 if the ADC is ready to start a new conversion. Implies
any previous conversion has completed.
0 whilst conversion in progress.
RO 0x0
7:4 Reserved. - - -
3 START_MANY Continuously perform conversions whilst this bit is 1. A
new conversion will start immediately after the previous
finishes.
RW 0x0
2 START_ONCE Start a single conversion. Self-clearing. Ignored if
start_many is asserted.
SC 0x0
1 TS_EN Power on temperature sensor. 1 - enabled. 0 - disabled. RW 0x0
0 EN Power on ADC and enable its clock.
1 - enabled. 0 - disabled.
RW 0x0
ADC: RESULT Register
Offset: 0x04
Table 579. RESULT
Register
Bits Description Type Reset
31:12 Reserved. - -
11:0 Result of most recent ADC conversion RO 0x000
ADC: FCS Register
Offset: 0x08
Description
FIFO control and status
Table 580. FCS
Register
Bits Name Description Type Reset
31:28 Reserved. - - -
27:24 THRESH DREQ/IRQ asserted when level >= threshold RW 0x0
23:20 Reserved. - - -
19:16 LEVEL The number of conversion results currently waiting in the
FIFO
RO 0x0
15:12 Reserved. - - -
11 OVER 1 if the FIFO has been overflowed. Write 1 to clear. WC 0x0
10 UNDER 1 if the FIFO has been underflowed. Write 1 to clear. WC 0x0
9 FULL RO 0x0
8 EMPTY RO 0x0
7:4 Reserved. - - -
3 DREQ_EN If 1: assert DMA requests when FIFO contains data RW 0x0
2 ERR If 1: conversion error bit appears in the FIFO alongside the
result
RW 0x0
RP2040 Datasheet
4.9. ADC and Temperature Sensor 586