Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
Name Number Type Power Domain Reset State Description
QSPI_SD3 51 Digital IO IOVDD QSPI data
QSPI_SCLK 52 Digital IO IOVDD Pull-Down QSPI clock
QSPI_SD0 53 Digital IO IOVDD QSPI data
QSPI_SD2 54 Digital IO IOVDD QSPI data
QSPI_SD1 55 Digital IO IOVDD QSPI data
QSPI_CSn 56 Digital IO IOVDD Pull-Up QSPI chip select
Table 624. Crystal
oscillator pins
Name Number Type Power Domain Description
XIN 20 Analogue (XOSC) IOVDD Crystal oscillator. XIN
may also be driven by
a square wave.
XOUT 21 Analogue (XOSC) IOVDD Crystal oscillator.
Table 625. Serial wire
debug pins
Name Number Type Power Domain Reset State Description
SWCLK 24 Digital In (FT) IOVDD Pull-Up Debug clock
SWD 25 Digital IO (FT) IOVDD Pull-Up Debug data
Table 626.
Miscellaneous pins
Name Number Type Power Domain Reset State Description
RUN 26 Digital In (FT) IOVDD Pull-Up Chip enable /
reset
TESTEN 19 Digital In IOVDD Pull-Down Test enable
(connect to Gnd)
Table 627. USB pins
Name Number Type Power Domain Description
USB_DP 47 USB IO USB_VDD USB Data +ve. 27Ω
series resistor
required for USB
operation
USB_DM 46 USB IO USB_VDD USB Data -ve. 27Ω
series resistor
required for USB
operation
Table 628. Power
supply pins
Name Number(s) Description
IOVDD 1, 10, 22, 33, 42, 49 IO supply
DVDD 23, 50 Core supply
VREG_VIN 44 Voltage regulator input supply
VREG_VOUT 45 Voltage regulator output
USB_VDD 48 USB supply
ADC_AVDD 43 ADC supply
GND 57 Common ground connection via
central pad
RP2040 Datasheet
5.2. Pinout 632