Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.5. DMA
- 2.6. Memory
- 2.7. Boot Sequence
- 2.8. Bootrom
- 2.9. Power Supplies
- 2.10. Core Supply Regulator
- 2.11. Power Control
- 2.12. Chip-Level Reset
- 2.13. Power-On State Machine
- 2.14. Subsystem Resets
- 2.15. Clocks
- 2.16. Crystal Oscillator (XOSC)
- 2.17. Ring Oscillator (ROSC)
- 2.18. PLL
- 2.19. GPIO
- 2.20. Sysinfo
- 2.21. Syscfg
- 2.22. TBMAN
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. UART
- 4.3. I2C
- 4.3.1. Features
- 4.3.2. IP Configuration
- 4.3.3. I2C Overview
- 4.3.4. I2C Terminology
- 4.3.5. I2C Behaviour
- 4.3.6. I2C Protocols
- 4.3.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.3.8. Multiple Master Arbitration
- 4.3.9. Clock Synchronization
- 4.3.10. Operation Modes
- 4.3.11. Spike Suppression
- 4.3.12. Fast Mode Plus Operation
- 4.3.13. Bus Clear Feature
- 4.3.14. IC_CLK Frequency Configuration
- 4.3.15. DMA Controller Interface
- 4.3.16. Operation of Interrupt Registers
- 4.3.17. List of Registers
- 4.4. SPI
- 4.5. PWM
- 4.6. Timer
- 4.7. Watchdog
- 4.8. RTC
- 4.9. ADC and Temperature Sensor
- 4.10. SSI
- 4.10.1. Overview
- 4.10.2. Features
- 4.10.3. IP Modifications
- 4.10.4. Clock Ratios
- 4.10.5. Transmit and Receive FIFO Buffers
- 4.10.6. 32-Bit Frame Size Support
- 4.10.7. SSI Interrupts
- 4.10.8. Transfer Modes
- 4.10.9. Operation Modes
- 4.10.10. Partner Connection Interfaces
- 4.10.11. DMA Controller Interface
- 4.10.12. APB Interface
- 4.10.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
- Appendix C: Documentation Release History
Parameter Symbol Minimum Maximum Units Comment
Single Ended Input
Voltage High
V
IHSE
2 V
Single Ended Input
Voltage Low
V
ILSE
0.8 V
Differential Input
Voltage High
V
IHDIFF
0.2 V
Differential Input
Voltage Low
V
ILDIFF
-0.2 V
Output Voltage
High
V
OH
2.8 USB_VDD V
Output Voltage
Low
V
OL
0 0.3 V
Pull-Up Resistance
- RPU2
R
PU2
0.873 1.548 kΩ
Pull-Up Resistance
- RPU1&2
R
PU1&2
1.398 3.063 kΩ
Pull-Down
Resistance
R
PD
14.25 15.75 kΩ
Table 634. ADC
characteristics
Parameter Symbol Minimum Maximum Units Comment
ADC Input Voltage
Range
V
PIN_ADC
0 ADC_AVDD V
Effective Number
of Bits
ENOB 9 bits Simulated
Resolved Bits 12 bits
ADC Input
Impedance
R
IN_ADC
100 kΩ
Table 635. Oscillator
pin characteristics
when using a Square
Wave input
Parameter Symbol Minimum Maximum Units Comment
Input Voltage High V
IH
0.65*IOVDD IOVDD + 0.3 V XIN only. XOUT
floating
Input Voltage Low V
IL
0 0.35*IOVDD V XIN only. XOUT
floating
See Section 2.16 for more details on the Oscillator, and Minimal Design Example for information on crystal usage.
5.2.3.5. Interpreting GPIO output voltage specifications
The GPIOs on RP2040 have four different output drive strengths, which are nominally called 2, 4, 8 and 12mA modes.
These are not hard limits, nor do they mean that they will always be sourcing (or sinking) the selected amount of
milliamps. The amount of current a GPIO sources or sinks is dependant on the load attached to it. It will attempt to drive
the output to the IOVDD level (or 0V in the case of a logic 0), but the amount of current it is able to source is limited,
which will be dependant on the selected drive strength. Therefore the higher the current load is, the lower the voltage
will be at the pin. At some point, the GPIO will be sourcing so much current, that the voltage is so low, it won’t be
recognised as a logic 1 by the input of a connected device. The purpose of the output specifications in Table 632 are to
try and quantify how much lower the voltage can be expected to be, when drawing specified amounts of current from
RP2040 Datasheet
5.2. Pinout 635