Datasheet

the pin.
The Output High Voltage (V
OH
) is defined as the lowest voltage the output pin can be when driven to a logic 1 with a
particular selected drive strength; e.g., 4mA being sourced by the pin whilst in 4mA drive strength mode. The Output
Low Voltage is similar, but with a logic 0 being driven.
In addition to this, the sum of all the IO currents being sourced (i.e. when outputs are being driven high) from the IOVDD
bank (essentially the GPIO and QSPI pins), must not exceed I
IOVDD_MAX
. Similarly, the sum of all the IO currents being sunk
(i.e. when the ouputs are being driven low) must not exceed I
IOVSS_MAX
.
Figure 169. Typical
Current vs Voltage
curves of a GPIO
output.
Figure 169 shows the effect on the output voltage as the current load on the pin increases. You can clearly see the
effect of the different drive strengths; the higher the drive strength, the closer the output voltage is to IOVDD (or 0V) for
a given current. The minimum V
OH
and maximum V
OL
limits are shown in red. You can see that at the specified current
for each drive strength, the voltage is well within the allowed limits, meaning that this particular device could drive a lot
more current and still be within V
OH
/V
OL
specification. This is a typical part at room temperature, there will be a spread of
other devices which will have voltages much closer to this limit. Of course, if your application doesn’t need such tightly
controlled voltages, then you can source or sink more current from the GPIO than the selected drive strength setting, but
experimentation will be required to determine if it indeed safe to do so in your application, as it will be outside the scope
of this specification.
5.3. Power Supplies
Table 636. Power
Supply Specifications
Power Supply Supplies Min Typ Max Units
IOVDD
a
Digital IO 1.62 1.8 / 3.3 3.63 V
DVDD Digital core 0.99 1.1 1.21 V
VREG_VIN Voltage regulator 1.62 1.8 / 3.3 3.63 V
RP2040 Datasheet
5.3. Power Supplies 636