User's Manual

Introduction
1-4
© Copyright ARM Limited 1999. All rights reserved.
ARM DUI 0125A
1.2 ARM Integrator/CM940T overview
The major components on the core module are as follows:
ARM940T microprocessor core
core module FPGA which implements:
SDRAM controller
system bus bridge
reset controller
interrupt controller
status, configuration, and interrupt registers.
volatile memory comprising:
up to 256MB of SDRAM (optional) via DIMM socket
256KB SSRAM.
SSRAM controller
clock generator
system bus connectors
Multi-ICE debug connector.
1.2.1 System architecture
Figure 1-2 illustrates the architecture of the core module.
Figure 1-2 ARM Integrator/CM940T block diagram
SSRAM
FPGA
SDRAM
ARM core
System bus connectors
Multi-ICE