User guide

Introduction
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 1-11
ID072410 Non-Confidential
• DBGEN input added as master debug enable. If de-asserted then debug is disabled.
• ETM upgraded from ARM ETM architecture v3.4 to 3.5 to include global time-stamping.
• The Vector Table Offset Register located at address 0xE000ED08 has been increased by
two bits from 29:7 to 31:7.
• ROM table identification registers have been updated. See Cortex-M3 ROM table
identification and entries on page 7-3.
• Verilog file and module names have been modified. The top module names for Cortex-M3
and the integration layer are now in capitals: CORTEXM3 and
CORTEXM3INTEGRATION.
• The ETM license define name has changed to ARM_CM3_ETM_LICENSE and is now
defined in
cm3_lic_defs.v rather than in the integration level.
• Watchpoints no longer occur if the transaction is aborted by the MPU.
• Errata fixes to the r2p0 release.