User guide
System Control 
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 4-5
ID072410 Non-Confidential
4.3 Register descriptions
This section describes the system control registers whose implementation is specific to this 
processor.
4.3.1 Auxiliary Control Register, ACTLR
The ACTLR characteristics are:
Purpose  Disables certain aspects of functionality within the processor.
Usage Constraints  There are no usage constraints.
Configurations  This register is available in all processor configurations.
Attributes  See the register summary in Table 4-1 on page 4-3.
Figure 4-1 shows the ACTLR bit assignments.
Figure 4-1 ACTLR bit assignments
Table 4-2 shows the ACTLR bit assignments.
4.3.2 CPUID Base Register, CPUID
The CPUID characteristics are:
Purpose  Specifies:
• the ID number of the processor core
• the version number of the processor core
• the implementation details of the processor core.
Usage Constraints  There are no usage constraints.
Configurations  This register is available in all processor configurations.
Attributes  See the register summary in Table 4-1 on page 4-3.
Reserved
31 3210
DISFOLD
DISDEFWBUF
DISMCYCINT
Table 4-2 ACTLR bit assignments
Bits Name Function
[31:3] - Reserved
[2] DISFOLD  Disables folding of 
IT
 instructions.
[1] DISDEFWBUF Disables write buffer use during default memory map accesses. This causes all bus faults to be precise, 
but decreases the performance of the processor because stores to memory must complete before the 
next instruction can be executed.
[0] DISMCYCINT  Disables interruption of multi-cycle instructions. This increases the interrupt latency of the processor 
because load/store and multiply/divide operations complete before interrupt stacking occurs.










