User guide
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. vii
ID072410 Non-Confidential
List of Figures
Cortex-M3 Technical Reference Manual
Figure 2-1 Cortex-M3 block diagram ............................................................................................................  2-2
Figure 3-1 System address map  ................................................................................................................  3-11
Figure 3-2 Bit-band mapping ......................................................................................................................  3-17
Figure 3-3 Processor register set  ...............................................................................................................  3-18
Figure 4-1 ACTLR bit assignments  ..............................................................................................................  4-5
Figure 4-2 CPUID bit assignments ...............................................................................................................  4-6
Figure 4-3 AFSR bit assignments ................................................................................................................  4-6
Figure 6-1 ICTR bit assignments ..................................................................................................................  6-4
Figure 7-1 CoreSight discovery ....................................................................................................................  7-2
Figure 7-2 CSW bit assignments ..................................................................................................................  7-7
Figure 9-1 ITM_TPR bit assignments ...........................................................................................................  9-5
Figure 10-1 ETM block diagram  ...................................................................................................................  10-3
Figure 10-2 ETMCR bit assignments  .........................................................................................................  10-11
Figure 10-3 ETMCCR bit assignments .......................................................................................................  10-14
Figure 10-4 ETMSCR bit assignments .......................................................................................................  10-15
Figure 10-5 ETMTECR1 bit assignments ...................................................................................................  10-16
Figure 10-6 ETMIDR bit assignments  ........................................................................................................  10-17
Figure 10-7 ETMCCER bit assignments  ....................................................................................................  10-18
Figure 10-8 ETMTESSEICR bit assignments  ............................................................................................ 10-19
Figure 10-9 ETMPDSR bit assignments ....................................................................................................  10-20
Figure 10-10 ITMISCIN bit assignments  ......................................................................................................  10-20
Figure 10-11 ITTRIGOUT bit assignments ...................................................................................................  10-21
Figure 10-12 ETM_ITATBCTR2 bit assignments .........................................................................................  10-22
Figure 10-13 ETM_ITATBCTR0 bit assignments .........................................................................................  10-22
Figure 11-1 TPIU block diagram  ..................................................................................................................  11-3
Figure 11-2 TPIU_ACPR bit assignments ....................................................................................................  11-6
Figure 11-3 TPIU_FFSR bit assignments ....................................................................................................  11-6
Figure 11-4 TPIU_FFCR bit assignments  ....................................................................................................  11-7
Figure 11-5 TRIGGER bit assignments ........................................................................................................  11-8
Figure 11-6 Integration ETM Data bit assignments ......................................................................................  11-9










