User guide

Embedded Trace Macrocell

ID072410 Non-Confidential

10.2.2 Timestamp format

Timestamps are encoded as 48-bit natural binary numbers. A system implementation may

provide a timestamp count which can be used by several trace sources as an aid to correlating

the trace streams.

10.2.3 Periodic synchronization

The ETM uses a fixed synchronization packet generation frequency of every 1024 bytes of

trace.

10.2.4 Data and instruction address compare resources

The DWT provides four address comparators on the data bus that provide debug functionality.

Within the DWT unit, you can specify the functions triggered by a match, and one of these

functions is to generate an ETM match input. These inputs are presented to the ETM as

Embedded In Circuit Emulator (ICE) comparator inputs.

A single DWT resource can trigger an ETM event and also generate instrumentation trace

directly from the same event.

You can configure the four DWT comparators individually to compare with the address of the

current executing instruction to permit the ETM access to an instruction address compare

resource. These inputs are presented to the ETM as Embedded ICE comparator inputs. The

DWT provides either one or four comparators, depending on the implementation of the

processor.

Note

Using a DWT comparator as an instruction address comparator reduces the number of available

data address comparisons.

See Chapter 8 Data Watchpoint and Trace Unit for more information about the DWT unit.

10.2.5 External inputs

Two external inputs, ETMEXTIN[1:0], enable additional components to generate trigger and

enable signals for the ETM.

10.2.6 Start/stop block

The start/stop block provides a single-bit resource that can be used as an input to other parts of

the resource logic, including the trace enable logic. The start/stop block can only be controlled

by using the EmbeddedICE inputs to the ETM. The DWT controls these inputs.

The start/stop block is set to the start state if any of the EmbeddedICE watchpoint inputs

selected as start resources in ETMTESSEICR go HIGH. The start/stop block is set to the stop

state if any of the EmbeddedICE watchpoint inputs selected as stop resources in

ETMTESSEICR go LOW.

If bit [25] of ETMTECR1 is 1, tracing will only be enabled when the start/stop block is in the

start state.

Tracing is also only enabled when the result of evaluating the Trace Enable Event is TRUE. This

event can be set to always be TRUE by programming a value of 0x6F to ETMTEEVR. For more

information see the Embedded Trace Macrocell Architecture Specification.