Specifications

ManualsBrandsASIX ManualsDocking StationAX88772

ASIX ELECTRONICS CORPORATION Released Date: 4/24/2007

4F, NO.8, Hsin Ann Rd., Science-Based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.

TEL: 886-3-579-9500

FAX: 886-3-579-9558 http://www.asix.com.tw

AX88772

USB to 10/100 Fast Ethernet/HomePNA Controller

Features

• Single chip USB to 10/100 Fast Ethernet and

HomePNA and HomePlug Network Controller

• Integrates on-chip 10/100Mbps Fast Ethernet PHY

• USB specification 1.1 and 2.0 compliant

• Supports USB Full and High Speed modes with Bus

power capability

• Supports 4 endpoints on USB interface

• High performance packet transfer rate over USB

bus using proprietary burst transfer mechanism

(submitted for US patent application)

• IEEE 802.3 10BASE-T and 100BASE-TX

compatible

• Embedded 20KB SRAM for RX packet buffering

and 8KB SRAM for TX packet buffering

• Supports both full-duplex and half-duplex

operation in Fast Ethernet

• Provides optional MII interface for Ethernet PHY

and HomePNA/ HomePlug PHY interface

• Supports Suspend mode and Remote Wakeup via

Link-up, Magic packet, or external pin

• Optional PHY power down during Suspend mode

• Supports 256/512 bytes (93c56/93c66) of serial

EEPROM (for storing USB Descriptors)

• Supports automatic loading of Ethernet ID, USB

Descriptors and Adapter Configuration from

EEPROM after power-on initialization

• External PHY loop-back diagnostic capability

• Integrates on-chip 3.3V to 2.5V voltage regulator

and requires only single power supply: 3.3V

• Small form factor with 128-pin LQFP package

• 12MHz and 25Mhz clock input from either crystal

or oscillator source

• Operating temperature range: 0°C to 70°C.

*IEEE is a registered trademark of the Institute of Electrical and

Electronic Engineers, Inc.

*All other trademarks and registered trademark are the property of their

respective holders.

Product Description

The AX88772 USB to 10/100 Fast Ethernet/HomePNA/HomePlug controller is a high performance and highly integrated

ASIC with embedded 28KB SRAM for packet buffering. It enables low cost and affordable Fast Ethernet network

connection to desktop, notebook PC, and embedded system using popular USB ports.

It has an USB interface to

communicate with USB host controller and is compliant with USB specification V1.1 and V2.0. It implements

10/100Mbps Ethernet LAN function based on IEEE802.3, and IEEE802.3u standards or HomePNA standard. It

integrates an on-chip 10/100Mbps Ethernet PHY to simplify system design and provides an optional media-independent

interface (MII) for implementing Fast Ethernet and HomePNA functions.

System Block Diagram

Always contact ASIX for possible updates before starting a design.

This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No

liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

USB I/F

AX88772

10/100 PHY (FX)

netic

RJ45

EEPROM

Home LAN PHY

netic

RJ11

Document No: AX88772_11/4/24/07

Magnetic

Summary of content (43 pages)

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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller Document No: AX88772_11/4/24/07 Features • • • • • • • • • • Single chip USB to 10/100 Fast Ethernet and HomePNA and HomePlug Network Controller Integrates on-chip 10/100Mbps Fast Ethernet PHY USB specification 1.1 and 2.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller Table of Contents 1.0 1.1 1.2 1.3 INTRODUCTION ................................................................................................................4 GENERAL DESCRIPTION ...........................................................................................................4 AX88772 BLOCK DIAGRAM ....................................................................................................4 AX88772 PINOUT DIAGRAM ..................
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.1.3 LEAKAGE CURRENT AND CAPACITANCE ............................................................................34 8.1.4 DC CHARACTERISTICS OF 2.5V I/O PINS ...........................................................................34 8.1.5 DC CHARACTERISTICS OF 3.3V I/O PINS ...........................................................................34 8.2 POWER CONSUMPTION...............................................................................
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 1.0 Introduction 1.1 General Description The AX88772 USB to 10/100 Fast Ethernet/HomePNA/HomePlug controller is a high performance and highly integrated ASIC with embedded 28KB SRAM for packet buffering. It enables low cost and affordable Fast Ethernet network connection to desktop, notebook PC, and embedded system using popular USB ports. It has an USB interface to communicate with USB host controller and is compliant with USB specification V1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 1.3 AX88772 Pinout Diagram The AX88772 is housed in the 128-pin LQFP package.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 2.0 Signal Description The following abbreviations apply to the following pin description table. I2 I3 I5 O2 O3 O5 B Input, 2.5V with 3.3V tolerant Input, 3.3V Input, 3.3V with 5V tolerant Output, 2.5V with 3.3V tolerant Output, 3.3V Output, 3.3V with 5V tolerant Bi-directional I/O B2 B5 PU PD P S Bi-directional I/O, 2.5V with 3.3V tolerant Bi-directional I/O, 3.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller CRS I2 TX_CLK I2 TXD [3:0] O2 TX_EN O2 TX_ER O2 EECK O5 EECS O5 EEDI O5 EEDO I5/PD XIN25M I XOUT25M O RSTPB I RXIP I RXIN I TXOP O TXON O IBREF B RX_LED O3 COL_LED O3 LINK_LED O3 FDX_LED O3 115 Carrier Sense. CRS is asserted high asynchronously by the PHY when either transmit or receive medium is non-idle. 102 Transmit Clock.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller ET_SPEED_LED RESET_N O3 I5/PU/S EXTWAKEUP_N I5/PU/S GPIO [2:0] B5/PD PHYRST_N O2 FORCEFS_N I3/PU LED O3 USB_SPEED_LE D O3 TESTSPEEDUP HS_TEST_MODE SCAN_TEST SCAN_ENABLE CLK60EXT CLKSEL DB [4:0] I3/PD I3/PD I3/PD I3/PD I3/PD I3/PD I2 INT_REGULATO R_EN I VDDAH GNDAH V25 P P P VDDK P VDD2 VDD3 P P 96 Ethernet speed LED indicator. This pin drives low when the Ethernet PHY is in 100BASE-TX mode and drives high when in 10BASE-T mode.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller GND P AVDDK P AVDD3 AGND P P 7, 17, 18, 25, 40, 75, 81, 87, 98, 100, 119, 124, 127 49, 53, 57, 64, 66, 68 28, 37, 39 29, 33, 38, 50, 54, 55, 60, 63, 67, 69 Digital Ground. Analog Core Power. 2.5V. Analog I/O Power. 3.3V. Analog Ground.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 3.0 Function Description 3.1 USB Core and Interface The USB core and interface contains an USB 2.0 transceiver, serial interface engine (SIE), USB bus protocol handshaking block, USB standard command, vendor command registers, logic for supporting bulk transfer, and interrupt transfer, etc. The USB interface is used to communicate with USB host controller and is compliant with USB specification V1.1 and V2.0. 3.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller communicating with multiple PHY devices at the same time by identifying the managed PHY with 5-bit, unique Phy ID. The Phy ID of the embedded 10/100 Ethernet PHY is being pre-assigned to “1_0000”. Figure 4 shows the internal control mux for the station management interface.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 3.9 MAC to MAC Connection via MII Interface Below figure shows recommended MAC-to-MAC connection for AX88772 MII Interfacing with an external Ethernet MAC device. When operating at this mode, the Ethernet MAC on both sides should be set to operate at 100M full-duplex mode. The U1 & R1 are reserved for adjusting RXDV/RXD[3:0] input setup/hold time with respect to AX88772 RX_CLK clock phase. Either R2 or R1 is installed at a time.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 4.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 4.1 Detailed Description The following sections provide detailed description for some of the field in serial EEPROM memory map, for other fields not covered here, please refer to AX88772 EEPROM user guide for more details. 4.1.1 Word Count for Preload (00h) The number of words to be preloaded by the EEPROM loader = 15h. 4.1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 4.1.4 Phy Register Offset for Interrupt Endpoint (0Fh) Bit 15 Bit 7 Bit 14 Reserved Bit 6 Reserved Bit 13 Bit 12 Bit 5 Bit 4 Bit 11 Bit 10 Bit 9 Phy Register Offset 1 Bit 3 Bit 2 Bit 1 Phy Register Offset 2 Bit 8 Bit 0 Phy Register Offset 1: Fill in Phy’s Register Offset of Primary Phy here. Upon each Interrupt Endpoint issued, its register value will be reported in byte# 5 and 6 of Interrupt Endpoint packet.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 4.1.8 Power-Up Steps After power-on reset, the ASIC will automatically perform following steps to the Ethernet Phys via MDC/MDIO lines, 1. Write to Phy_ID of 00h with Phy register offset 00h to power down all Phys attached to station management interface. 2. Write to Primary Phy_ID with Phy register offset 00h to power down Primary Phy. 3. Write to Secondary Phy_ID with Phy register offset 00h to power down Secondary Phy.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 5.0 USB Configuration Structure 5.1 USB Configuration The AX88772 supports 1 Configuration only. 5.2 USB Interface The AX88772 supports 1 interface. 5.3 USB Endpoints The AX88772 supports following 4 endpoints: Endpoint 0: Control endpoint. It is used for configuring the device, e.g., standard commands and vendor commands, etc. Endpoint 1: Interrupt endpoint. It is used for reporting status. Endpoint 2: Bulk In endpoint.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.0 USB Commands There are three command groups for Endpoint 0 (Control Endpoint) in AX88772: The USB standard commands The USB vendor commands The USB Communication Class commands 6.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2 USB Vendor Commands No Setup Command Data Bytes 1. C002_AA0B_0C00_0800 8 bytes in Data stage Access Description Type Read Rx/Tx SRAM Read Register 2. 4003_AA0B_0C00_0800 8 bytes in Data stage Write Rx/Tx SRAM Write Register 3. 4006_0000_0000_0000 No data in Data stage 4. C007_ AA00_CC00_0200 2 bytes in Data stage Write Software Serial Management Control Register Read PHY Read Register 5.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1 Detailed Register Description 6.2.1.1 Rx/Tx SRAM Read Register (02h, read only) Bit7 Bit6 Bit5 Bit4 Bit3 AA [7:0] Bit2 Reserved 0h Bit1 Bit0 B [3:0] C [3:0] DD [7:0] in Data stage EE [7:0] in Data stage FF [7:0] in Data stage GG [7:0] in Data stage HH [7:0] in Data stage II [7:0] in Data stage JJ [7:0] in Data stage KK [7:0] in Data stage {B [3:0], AA [7:0]}: The read address of RX or TX SRAM. C [0]: RAM selection.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.4 PHY Read Register (07h, read only) Bit7 Bit6 Bit5 Bit4 Bit3 AA [7:0] 00h CC [7:0] Bit2 Bit1 Bit0 Bit1 Bit0 Bit1 Bit0 Host_EN AA [4:0]: The PHY ID value. CC [4:0]: The register address of Ethernet PHY’s internal register. AA [7:5]: Reserved CC [7:5]: Reserved 6.2.1.5 PHY Write Register (08h, write only) Bit7 Bit6 Bit5 Bit4 Bit3 AA [7:0] 00h CC [7:0] Bit2 AA [4:0]: The PHY ID value.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.9 SROM Write Register (0Ch, write only) Bit7 Bit6 Bit5 Bit4 Bit3 AA [7:0] 00h CC [7:0] DD [7:0] Bit2 Bit1 Bit0 AA [7:0]: The write address of Serial EEROM. { DD [7:0], CC [7:0] }: The write data value of Serial EEROM 6.2.1.10 Write SROM Enable (0Dh, write only) User issues this command to enable write permission to Serial EEPROM from SROM Write Register. 6.2.1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller MFB [1:0]: Maximum Frame Burst transfer on USB bus. 00: 2048 Bytes 01: 4096 Bytes 10: 8192 Bytes 11: 16384 Bytes (default). 6.2.1.13 IPG/IPG1/IPG2 Control Register (11h, read only and 12h, write only) Bit7 Bit6 Bit5 Bit4 Bit3 AA [7:0] BB [7:0] CC [7:0] Bit2 Bit1 Bit0 AA [6:0] = IPG [6:0]. BB [6:0] = IPG1 [6:0]. CC [6:0] = IPG2 [6:0]. IPG [6:0]: Inter Packet Gap for back-to-back transfer on TX direction in MII mode (default = 15h).
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.15 Multicast Filter Array (15h, read only and 16h, write only) Bit7 Bit6 Bit5 Bit4 Bit3 MA 0 [7:0] MA 1 [7:0] MA 2 [7:0] MA 3 [7:0] MA 4 [7:0] MA 5 [7:0] MA 6 [7:0] MA 7 [7:0] Bit2 Bit1 Bit0 {MA7 [7:0], MA6 [7:0], MA5 [7:0], MA4 [7:0], MA3 [7:0], MA2 [7:0], MA1 [7:0], MA0 [7:0]} = the multicast address bit map for multicast frame filtering block. See Figure 5: Multicast Filter Example, for example.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.18 Medium Status Register (1Ah, read only) and Medium Mode Register (1Bh, write only) Bit7 PF Bit6 0 Reserved Bit5 TFC Bit4 RFC SM Bit3 0 SBP Bit2 1 Reserved Bit1 FD PS Bit0 0 RE AA [7:0] = {PF, JFE, TFC, RFC, EN125, AC, FD, GM}. BB [7:0] = {Reserved, SM, SBP, JE, PS, RE}. Bit 0: Please always write 0 to this bit. PS: Port Speed in MII mode 1: 100 Mbps (default). 0: 10 Mbps. FD: Full Duplex mode 1: Full Duplex mode (default).
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.20 Monitor Mode Register (1Dh, write only) Bit7 Bit6 Bit5 Reserved Bit4 Bit3 Bit2 RWMP Bit1 RWLU Bit0 MOM MOM: Monitor Mode. 1: Enable. All received packets will be checked on DA and CRC but not buffered into memory. 0: Disabled (default). RWLU: Remote Wakeup trigger by Ethernet Link-up. 1: Enable. 0: Disabled (default). RWMP: Remote Wakeup trigger by Magic Packet. 1: Enable. 0: Disabled (default). AA [7:3]: Reserved. 6.2.1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.1.23 Software Reset Register (20h, write only) Bit7 Reserved Bit6 IPPD Bit5 IPRL Bit4 BZ Bit3 PRL Bit2 PRTE Bit1 RT Bit0 RR RR: Clear frame length error for Bulk In. 1: set high to clear state. 0: set low to exit clear state (default). RT: Clear frame length error for Bulk Out. 1: set high to enter clear state. 0: set low to exit clear state (default). PRTE: External Phy Reset pin Tri-state Enable. 1: Enable, i.e.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 6.2.2 Remote Wakeup Description After AX88772 enters into suspend mode, either the USB host or AX88772 itself can awake it up and resume back to the original operation mode before it entered suspend. Following truth table shows the chip setting, wakeup event, and device response supported by this ASIC. Note that “X” stands for don’t-care.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 7.0 Embedded Ethernet Phy Register Description Address 0h 1h 2h 3h 4h 5h 6h 7h 8h-Fh Register Name BMCR BMSR PHYIDR1 PHYIDR2 ANAR ANLPAR ANER Reserved IEEE reserved Description Basic mode control register, basic register. Basic mode status register, basic register. PHY identifier register 1, extended register. PHY identifier register 2, extended register. Auto negotiation advertisement register, extended register.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 10 Isolate (PHYAD = 00000), RW 9 Restart auto-negotiation 0, RW / SC 8 Duplex mode 1, RW 7 Collision test 0, RW 6:0 Reserved X, RO 1 = Power down 0 = Normal operation Isolate: 1 = Isolate 0 = Normal operation Restart auto-negotiation: 1 = Restart auto-negotiation 0 = Normal operation Duplex mode: 1 = Full duplex operation 0 = Normal operation Collision test: 1 = Collision test enabled 0 = Normal operation Reserved: Write as 0, read as “do
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 7.1.3 PHY Identifier Register 1 Address 02h Bit Bit Name 15:0 OUI_MSB Default 003B hex, RO / PS Description OUI most significant bits: Bits 3 to 18 of the OUI are mapped to bits 15 to 0 of this register respectively. The most significant two bits of the OUI are ignored. 7.1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 7.1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.0 Electrical Specifications 8.1 DC Characteristics 8.1.1 Absolute Maximum Ratings Symbol VDDK Parameter Digital core power supply Rating - 0.3 to VDDK + 0.3 Unit V VDD2 VDD3 AVDDK AVDD3 VIN2 Power supply of 2.5V I/O Power supply of 3.3V I/O Analog core power supply Power supply of analog I/O Input voltage of 2.5V I/O Input voltage of 2.5V I/O with 3.3V tolerant Input voltage of 3.3V I/O - 0.3 to VDD2 + 0.3 - 0.5 to VDD3 + 0.5 - 0.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.1.3 Leakage Current and Capacitance Symbol IIN IOZ CIN COUT Parameter Input current Tri-state leakage current Input capacitance Condition No pull-up or pull-down Output capacitance Min -10 -10 - Typ ±1 ±1 3.1 Max 10 10 - Unit μA μA pF - 3.1 - pF CBID Bi-directional buffer capacitance 3.1 pF Note: The capacitance listed above does not include pad capacitance and package capacitance.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.2 Power Consumption 8.2.1 Internal Phy Symbol IVDDK2 IVDD3 IAVDDK IAVDD3 ΘJC ΘJA 8.2.2 Description Condition Current consumption of VDDK/VDD2, Operating at Ethernet 2.5V 100Mbps full duplex mode and USB High Current consumption of VDD3, 3.3V Current consumption of AVDDK, 2.5V speed mode Current consumption of AVDD3, 3.3V Thermal resistance of junction to case Thermal resistance of junction to ambient Still air Min - Typ 25.4 - <1 69.3 51.1 16.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.4 AC Timing Characteristics 8.4.1 Clock Timing 8.4.1.1 XIN12M TP_XIN12M TL_XIN12M TH_XIN12M VIH VIL TR_XIN12M Symbol TP_XIN12M TH_XIN12M TL_XIN12M TR_XIN12M TF_XIN12M TF_XIN12M Parameter XIN12M clock cycle time XIN12M clock high time XIN12M clock low time XIN12M rise time XIN12M fall time Condition VIL (max) to VIH (min) VIH (min) to VIL (max) Min - Typ 83.33 41.6 41.6 - Max 1.0 1.0 Unit ns ns ns ns ns Typ 40.0 20.0 20.0 - Max 1.0 1.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.4.2 Reset Timing XIN12M RESET_N Trst Symbol Description Trst Reset pulse width (6ms ~10ms) after XIN12M is running Min 72000 Typ - Max - Units XIN12M clock cycle 8.4.3 MII Timing (100Mbps) Ttclk Ttch Ttcl TX_CLK Tts Tth TXD [3:0] TX_EN, TX_ER Symbol Ttclk Ttch Ttcl Tts Tth Description Min 28.0 5.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 8.4.4 Station Management Timing Tclk MDC Tch Tcl Tod MDIO (as output) Ts Th MDIO (as input) Symbol Tclk Tch Tcl Tod Ts Th Description MDC clock cycle time MDC clock high time MDC clock low time MDC clock falling edge to MDIO output delay MDIO data input setup time MDIO data input hold time Min 0 10 0 Typ 666 333 333 - Max 2 - Units ns ns ns ns ns ns 8.4.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 9.0 Package Information A A2 A1 L L1 D Hd He E pin 1 e b θ Symbol Millimeter Min Typ Max A1 0.05 - - A2 1.35 1.40 1.45 A - - 1.60 b 0.13 0.18 0.23 D 13.90 14.00 14.10 E 13.90 14.00 14.10 e - 0.4 BSC - Hd 15.85 16.00 16.15 He 15.85 16.00 16.15 L 0.45 0.60 0.75 L1 - 1.00 REF - θ 0° 3.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 10.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller Appendix A: System Applications Some typical applications for AX88772 are illustrated bellow. A.1 USB to Fast Ethernet Converter RJ45 Current driver do not support for this MAGNETIC RJ45 10/100 Ethernet PHY MAGNETIC AX88772 EEPROM USB I/F A.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller Revision History Revision Date Comment V 0.1 V 0.2 1/5/04 4/16/04 V 0.3 8/9/04 V 0.4 V 0.5 V 0.6 V 0.7 V 1.0 12/23/04 1/6/05 3/23/05 6/21/05 9/15/06 V1.1 4/24/07 Initial Release. Added power consumption data and updated pin description for pin USB_SPEED_LED. Changed Bulk In transfer to Endpoint 2 and Bulk Out transfer to Endpoint 3 in section 5.3. Added thermal data in section 8.2. Added operating temperature in feature and section 8.1.2.
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AX88772 USB to 10/100 Fast Ethernet/HomePNA Controller 4F, No. 8, Hsin Ann Rd., Science-Based Industrial Park, HsinChu, Taiwan, R.O.C. TEL: 886-3-5799500 FAX: 886-3-5799558 Email: support@asix.com.tw Web: http://www.asix.com.