Specifications

ASIX ELECTRONICS CORPORATION
12
AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
3.9 MAC to MAC Connection via MII Interface
Below figure shows recommended MAC-to-MAC connection for AX88772 MII Interfacing with an external Ethernet
MAC device. When operating at this mode, the Ethernet MAC on both sides should be set to operate at 100M full-duplex
mode.
The U1 & R1 are reserved for adjusting RXDV/RXD[3:0] input setup/hold time with respect to AX88772 RX_CLK
clock phase. Either R2 or R1 is installed at a time. User should check the TX_CLK, TXD[3:0], TXEN output timing of
external Ethernet MAC device vs. AX88772’s RXDV/RXD[3:0] input setup/hold time.
The U2 & R3 are reserved for adjusting RXDV/RXD[3:0] input setup/hold time with respect to RX_CLK clock phase on
external Ethernet MAC device. Either R3 or R4 is installed at a time. User should check the TX_CLK, TXD[3:0], TXEN
output timing of AX88772 vs. the RXDV/RXD[3:0] setup/hold time of external Ethernet MAC device.
AX88772
10/100M
Ethernet MAC
RX_CL
K
RXD3
RXD2
RXD1
RXD0
RXDV
CRS
COL
RXE
R
TX_CLK
TXD3
TXD2
TXD1
TXD0
TXEN
TXER
TX_CL
K
TXD3
TXD2
TXD1
TXD0
TXEN
TXE
R
RX_CLK
RXD3
RXD2
RXD1
RXD0
RXDV
CRS
COL
RXER
MDC
MDIO
GPIO
MDC
MDIO
MDINT
4.7K
Ω
R3 0Ω
R4 0Ω
U2
3.3V
47KΩ
4.7K
Ω
R1 0Ω
R2 0Ω
U1
3.3V
47KΩ
L3
SBK160808T-110Y-S
11 ohm@100MHz
3.3V
0.1μF
0.1μF
25MHz-OSC
OUT
VCC GND
R5
22Ω