Installation guide

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ODT PARK (CH B)
Congure the memory on die termination resistors' PARK for channel B.
ODT NOM (CH B)
Use this to change ODT (CH B) Auto/Manual settings. e default is [Auto].
ODT WR (CH C)
Congure the memory on die termination resistors' WR for channel C.
ODT PARK (CH C)
Congure the memory on die termination resistors' PARK for channel C.
ODT NOM (CH C)
Use this to change ODT (CH C) Auto/Manual settings. e default is [Auto].
ODT WR (CH D)
Congure the memory on die termination resistors' WR for channel D.
ODT PARK (CH D)
Congure the memory on die termination resistors' PARK for channel D.
ODT NOM (CH D)
Use this to change ODT (CH D) Auto/Manual settings. e default is [Auto].
FIVR Conguration
CPU Vcore Voltage Mode
Auto: For optimized settings.
Override: e voltage is xed.
Vcore Voltage Additional Oset
Congure the dynamic Vcore voltage added to the Vcore.
CPU Cache Voltage Mode
Auto: For optimized settings.
Adaptive: Add voltage to the CPU Cache when the system is under heavy loading.
Override: e voltage is xed.
CPU Cache Voltage Oset
Congure the voltage for the CPU Cache. Setting the voltage higher may increase
system stability when overclocking.