User's Manual

Single Board Computer 63
PCI Express Conguration
PCI Express Clock Gating
This item allows you to enable or disable PCI Express Clock Gating for
each root port.
Conguration options: [Disabled] [Enabled]
PCI Express Root Port 5 / 9 / 12 / 14
PCI Express Root Port 5 / 9 / 12 / 14
This item allows you to control the PCI Express Root Port.
Conguration options: [Disabled] [Enabled]
Disable Gen2 Pll Shutdown and L1 Controller Power Gating
When enabled, disables Gen2 PLL Shutdown and L1 Controller
power gating. Enable this option if using Titan Ridge A0/Alpine
Ridge Thunderbolt controller.
Conguration options: [Disabled] [Enabled]
NOTE: The following items appear only when PCI Express Root Port 5
/ 9 / 12 / 14 is set to [Enabled].
Disable Gen2 Pll Shutdown and L1
[Built-In] A built-in device is connected to this rootport.
Slotimplemented bit will be clear.
[Slot] This rootport connects to user-accessible slot.
Slotimplemented bit will be set.
ASPM 4
This item allows you to select the ASPM state for energy-saving
conditions.
Conguration options: [Disabled] [L0s] [L1] [L0sL1] [Auto]
4.4.6 PCH-IO Conguration