User's Manual

ASUS DSBF-D SeriesASUS DSBF-D Series
ASUS DSBF-D SeriesASUS DSBF-D Series
ASUS DSBF-D Series
4-194-19
4-194-19
4-19
Echo TPR [Disabled]Echo TPR [Disabled]
Echo TPR [Disabled]Echo TPR [Disabled]
Echo TPR [Disabled]
Configuration options: [Disabled] [Enabled]
Discrete MTRR Allocation [Disabled]Discrete MTRR Allocation [Disabled]
Discrete MTRR Allocation [Disabled]Discrete MTRR Allocation [Disabled]
Discrete MTRR Allocation [Disabled]
Configuration options: [Disabled] [Enabled]
4.4.24.4.2
4.4.24.4.2
4.4.2
Chipset ConfigurationChipset Configuration
Chipset ConfigurationChipset Configuration
Chipset Configuration
This menu shows the chipset configuration settings. Select an item then
press <Enter> to display a pop-up menu with the configuration options.
F1:Help
↑↑
↑↑
↑
↓ ↓
↓ ↓
↓ : Select Item -/+: Change Values F9: Setup Defaults
ESC: Exit
→← →←
→← →←
→←: Select Menu Enter: Select Sub-menu F10: Save and Exit
Item Specific Help
Enable Configuration/
Memory mapped accesses to
the Crystal Beach
Configuration space
located in Device 8, Fn
0, and Fn 1.
Chipset Configuration
Crystal Beach Configure Enable [Enabled]
SERR Signal Condition [Single Bit]
4GB PCI Hole Granularity [256 MB]
Memory Branch Mode [Interleave]
Branch 0 Rank Sparing [Disabled]
Branch 1 Rank Sparing [Disabled]
Enhanced x8 Detection [Enabled]
Force ITK Config Clocking [Disabled]
Enable Multimedia Timer [No]
FBDIMM(S)Thermal Throttling Control [Open Loop]
Open Loop Type [Best Performan]
Memory Cache
PhoenixBIOS Setup Utility
Advanced
Crystal Beach Configure Enable [Enabled]Crystal Beach Configure Enable [Enabled]
Crystal Beach Configure Enable [Enabled]Crystal Beach Configure Enable [Enabled]
Crystal Beach Configure Enable [Enabled]
Allows you to enable or disable the Configuration/Memory mapped
accesses to the Crystal Beach Configuration space located in Device 8, Fn
0, and Fn 1. Configuration options: [Disabled] [Enabled]
SERR Signal Condition [Single Bit]SERR Signal Condition [Single Bit]
SERR Signal Condition [Single Bit]SERR Signal Condition [Single Bit]
SERR Signal Condition [Single Bit]
Allows you to select the ECC error that the SERR# asserts.
Configuration options: [None] [Single Bit] [Multiple Bit] [Both]
4GB PCI Hole Granularity [256 MB]4GB PCI Hole Granularity [256 MB]
4GB PCI Hole Granularity [256 MB]4GB PCI Hole Granularity [256 MB]
4GB PCI Hole Granularity [256 MB]
Allows you to select the granularity of the PCI hole for PCI resource.
Configuration options: [256 MB] [512 MB] [1.0 GB] [2.0 GB]
Memory Branch Mode [Interleave]Memory Branch Mode [Interleave]
Memory Branch Mode [Interleave]Memory Branch Mode [Interleave]
Memory Branch Mode [Interleave]
Allows you to select the memory branch mode.
Configuration options: [Sequential] [Interleave] [Mirror] [Single Channel]