User Manual

Table Of Contents
3-15
ASUS ESC N4A-E11
Prefetcher settings
L1 Stream HW Prefetcher [Auto]
Allows you to enable or disable L1 Stream HW Prefetcher.
Configuration options: [Disable] [Enable] [Auto]
L1 Stride Prefetcher [Auto]
Uses memory access history of individual instructions to fetch additional lines
when each access is a constant distance from the previous.
Configuration options: [Disable] [Enable] [Auto]
L1 Region Prefetcher [Auto]
Uses memory access history to fetch additional lines when the data access for
a given instruction tends to be followed by other data accesses.
Configuration options: [Disable] [Enable] [Auto]
L2 Stream HW Prefetcher [Auto]
Allows you to enable or disable L2 Stream HW Prefetcher.
Configuration options: [Disable] [Enable] [Auto]
L2 Up/Down Prefetcher [Auto]
Uses memory access history to determine whether to fetch the next or previous
line for all memory access.
Configuration options: [Disable] [Enable] [Auto]
Core Watchdog
Core Watchdog Timer Enable [Auto]
Allows you to enable or disable CPU Watchdog Timer.
Configuration options: [Disable] [Enable] [Auto]
The following items are only available when Core Watchdog Timer Enable is set to
[Enabled].
Core Watchdog Timer Interval [Auto]
Configuration options: [21.461s] [10.730s] [5.364s] [2.681s] [1.340s]
[669.41ms] [334.05ms] [166.37ms] [82.53ms] [40.61ms] [20.970ms]
[10.484ms] [5.241ms] [2.620ms] [1.309ms] [654.08us] [326.4us] [162.56us]
[80.64us] [39.68us] [Auto]
Core Watchdog Timer Severity [Auto]
Allows you to specify the CPU watch dog timer severity.
Configuration options: [No Error] [Transparent] [Corrected] [Deferred]
[Uncorrected] [Fatal] [Auto]
RedirectForReturnDis [Auto]
This option is from a workaround for GCC/C000005 issue for XV Core on
CZ A0, setting MSRC001_1029 Decode Configuration (DE_CFG) bit 14
[DecfgNoRdrctForReturns] to 1.
Configuration options: [Auto] [1] [0]