User Manual

4-27
ASUS ESC N4A-E11
The following item appears only when DRAM Write CRC Enable and Retry Limit is set to
[Enabled].
Max Write CRC Error Replay [8]
The values in hex, 1, 2, or 3 is invalid.
Configuration options: [0] - [39]
Disable Memory Error Injection [True]
Configuration options: [False] [True]
ECC Configuration
DRAM ECC Symbol Size [Auto]
Configuration options: [x4] [x8] [x16] [Auto]
DRAM ECC Enable [Auto]
This option allows you to enable or disable DRAM ECC. Auto will set
ECC to enable.
Configuration options: [Disabled] [Enabled] [Auto]
DRAM UECC Retry [Auto]
This option allows you to enable or disable DRAM UECC Retry.
Configuration options: [Disabled] [Enabled] [Auto]
Security
TSME [Auto]
Configuration options: [Disabled] [Enabled] [Auto]
Data Scramble [Auto]
Configuration options: [Disabled] [Enabled] [Auto]
Phy Configuration
PMU Training
DFE Read Training [Auto]
Perform 2D Read Training with DFE on.
Configuration options: [Disabled] [Enabled] [Auto]
FFE Write Training [Auto]
Perform 2D Read WriteTraining with FFE on.
Configuration options: [Disabled] [Enabled] [Auto]
PMU Pattern Bits Control [Auto]
Configuration options: [Auto] [Manual]
The following item appears only when PMU Pattern Bits Control is set to [Manual].
PMU Pattern Bits [0]
Configuration options: [0] - [9]
DRAM Memory Mapping
Chipselect Interleaving [Auto]
Allows you to set interleave memory blocks across the DRAM chip selects for
node 0.
Configuration options: [Disabled] [Auto]
BankGroupSwap [Auto]
Configuration options: [Enabled] [Disabled] [Auto]