User Manual

4-34
Chapter 4: BIOS Setup
LCLK Frequency Control
Root Complex 0x00 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0x00-0x3F).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
Root Complex 0x40 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0x40-0x7F).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
Root Complex 0x80 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0x80-0xBF).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
Root Complex 0xC0 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0xC0-0xFF).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
DF PState Mode Select [Auto]
[Normal] Normal
[Limit Highest] FCLK is limited to DF Pstate FCLK Limit, only the highest DF
Pstate is used.
[Limit All] FCLK is limited to DF Pstate FCLK limit, all DF Pstates are
used.
[Auto] Auto
The following item appears only when DF PState Mode Select is set to [Limit Highest] or
[Limit All].
DF PState FClk Limit [Auto]
Allows you to set the fixed PState when DF PState Mode Select is overridden.
Configuration options: [1600 MHz] [1467 MHz] [1333 MHz] [1200 MHz] [1067
MHz] [933 MHz] [800 MHz] [Auto]
EDC Control [Auto]
[Auto] Use the fused VDDCR_CPU EDC limit.
[Manual] User can set customized VDDCR_CPU EDC limit.