User Manual
Table Of Contents
- Safety information
- Chapter 1: Product Introduction
- Chapter 2: Hardware Setup
- 2.1 Chassis cover
- 2.2 Central Processing Unit (CPU)
- 2.3 System memory
- 2.4 Storage devices
- 2.5 Expansion slots
- 2.5.1 The PCI Express riser card
- 2.5.2 Installing an ASUS PIKE II card
- 2.5.3 Reconnecting the cable to the M.2 expansion board (only for SKU-3)
- 2.5.4 Installing an M.2 (NGFF) card
- 2.5.5 Reconnecting the cable to the OCP 3.0 slot baseboard (only for SKU-2)
- 2.5.6 (optional) Installing the PFR module
- 2.5.7 Configuring an expansion card
- 2.6 Cable connections
- 2.7 SATA/SAS backplane cabling
- 2.8 Removable/optional components
- Chapter 3: Installation Options
- Chapter 4: Motherboard Infomation
- Chapter 5: BIOS Setup
- 5.1 Managing and updating your BIOS
- 5.2 BIOS setup program
- 5.3 Main menu
- 5.4 Advanced menu
- 5.4.1 OffBoard SATA Controller Configuration
- 5.4.2 Trusted Computing
- 5.4.3 ACPI Settings
- 5.4.4 Redfish Host Interface Settings
- 5.4.5 Onboard LAN Configuration
- 5.4.6 Serial Port Console Redirection
- 5.4.7 SIO Common Setting
- 5.4.8 SIO Configuration
- 5.4.9 PCI Subsystem Settings
- 5.4.10 USB Configuration
- 5.4.11 Network Stack Configuration
- 5.4.12 CSM (Compatibility Support Module)
- 5.4.13 NVMe Configuration
- 5.4.14 APM Configuration
- 5.4.15 Third-party UEFI driver configurations
- 5.5 Platform Configuration menu
- 5.6 Socket Configuration menu
- 5.7 Event Logs menu
- 5.8 Server Mgmt menu
- 5.9 Security menu
- 5.10 Boot menu
- 5.11 Tool menu
- 5.12 Save & Exit menu
- Chapter 6: Driver Installation
- Appendix
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Chapter 5: BIOS Setup
Sierra Peak Memory Region Buffer Size [None]
Select size of memory buffer for each single Sierra Peak instance.
Configuration options: [None] [1MB] [8MB] [64MB] [128MB] [256MB]
[512MB] [1GB]
Port 0/DMI
Settings related to PCI Express Ports (0/1A/1B/1C/1D/2A/2B/2C/2D/3A/3B/3C/3D/4A4
B/4C/4D/5A/5B/5C/5D)
Link Speed [Auto]
Choose the Link Speed for this PCIe port.
Configuration options: [Auto] [Gen 1 (2.5 GT/s)] [Gen 2 (5 GT/s)] [Gen 3 (8
GT/s)]
The following item appears only when
Link Speed
is set to
[Auto]
,
[Gen 2 (5 GT/s)]
, or
[Gen
3 (8 GT/s)]
.
PCI-E Port DeEmphasis [-6.0 dB]
De-Emphasis control (LNKCON2 [6]) for this PCIe port.
Configuration options: [-6.0 dB] [-3.5 dB]
PCI-E Port Clocking [Common]
Configure port clocking via LNKCON [6]. This refers to this component and
the down stream component.
Configuration options: [Distinct] [Common]
PCI-E Port Clock Gating [Enable]
Allows you to enable or disable Clock Gating for this PCIe port.
Configuration options: [Disable] [Enable]
Data Link Feature Exchange [Enable]
Allows you to enable or disable data link feature negotiation in the Data
Link Feature Capabilities (DLFCAP) register.
Configuration options: [Disable] [Enable]
DMI Port MPSS [Auto]
Configure Max Payload Size Supported in PCIe Device Capabilities
register. If default value is not used make sure MPSS in PCH root ports is
updated to the same or smaller value.
Configuration options: [128B] [256B] [Auto]
PCI-E Port D-state [D0]
Set to D0 for normal operation, D3Hot to bi in low-power state.
Configuration options: [D0] [D3Hot]
PCI-E ASPM Support [Disable]
Allows you to enable or disable ASPM (L1) support for the downstream
devices.
Configuration options: [Auto] [L1 Only] [Disable]
The following item appears only when
PCI-E ASPM Support
is set to
[Auto]
or
[L1 Only]
.
PCI-E Port L1 Exit Latency [8uS - 16uS]
The length of time this port requires to complete transition from L1 to L0.
Configuration options: [<1uS] [1uS - 2uS] [2uS - 4uS] [4uS - 8uS] [8uS -
16uS] [16uS - 32uS] [32uS - 64uS] [>64uS]