Owner manual

ASUS P5S-B User’s Manual54
Chipset Features
IV. BIOS SETUP
IV. BIOS SETUP
Chipset Features
Details of Chipset Features Setup
SDRAM Configuration (By SPD)
This sets the optimal timing for items 2-4. Leave on default setting, depending on
the memory modules that you are using. Default setting is By SPD, which config-
ures items 2-4 by reading the contents in the SPD (Serial Presence Detect) device.
This 8-pin serial EEPROM device stores critical parameter information about the
module, such as memory type, size, speed, voltage interface, and module banks.
SDRAM CAS Latency
This controls the latency between SDRAM read command and the time that the
data actually becomes available. Leave on default setting.
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to SDRAM.
Leave on default setting.
SDRAM RAS to CAS Delay
This controls the latency between SDRAM active command and the read/write
command. Leave on default setting.
ROM Cycle Wait State (4-Wait)
Leave both on default setting.
16-bit I/O Recovery Time (5 BUSCLK) / 8-bit I/O Recovery Time (8 BUSCLK)
Timing for 16- and 8-bit ISA cards, respectively. Leave on default settings.
ISA Bus Clock (PCICLK/4)
Leave on default setting.
Chipset Features Setup
Chipset Features Setup controls the configuration of the board’s chipset. Control
keys for this screen are the same as in the BIOS Features Setup screen.
NOTE: SETUP Defaults are noted in parenthesis next to each function heading.