User Manual

30
PRIME / TUF GAMING Intel
®
500 Series BIOS Manual
PCI Express Clock Gating
Allows you to enable or disable the PCI Express Clock Gating for each root port.
Conguration options: [Disabled] [Enabled]
7.2 CPU Configuration
This menu displays the CPU-related information that the BIOS detects automatically and the
items in this menu allow you to congure the CPU-related settings.
The items in this menu may vary based on the CPU installed.
Tcc Offset Time Window
Allows you to specify the time window for the Running Average Temperature Limit (RATL)
feature. RATL allows you to set an average max thermal temperature. Temperatures within
the time window can get higher than the temperature threshold but only the average is used
to cause frequency clipping.
Conguration options: [Disabled] [5 ms] [10 ms] [55 ms] [156 ms] [375 ms] [500 ms] [750 ms]
[1 sec] [2 sec] [3 sec] [4 sec] [5 sec] [6 sec] [7 sec] [8 sec] [10 sec]
[12 sec] [14 sec] [16 sec] [20 sec] [24 sec] [28 sec] [32 sec] [40 sec]
[48 sec] [56 sec] [64 sec] [80 sec] [96 sec] [112 sec] [128 sec]
[160 sec] [192 sec] [224 sec] [256 sec] [320 sec] [384 sec] [448 sec]
Hardware Prefetcher
Allows you to turn on or off the MLC streamer prefetcher.
Conguration options: [Disabled] [Enabled]
Adjacent Cache Line Prefetch
Allows you to turn on or off prefetching of adjacent cache lines.
Conguration options: [Disabled] [Enabled]