User Manual

36
PRIME / TUF GAMING Intel
®
500 Series BIOS Manual
GPIO3 Force Pwr
Allows you to enable or disable GPIO3. Conguration options: [On] [Off]
Wait time in ms after applying Force Pwr
Allows you to set the wait time specied in milli second after Force Pwr is asserted
before access the TBT controller. Conguration options: [1] – [5000]
GPIO filter
GPIO lter is needed to avoid electrical noise on PCH GPIOs during hotplug of 12V
USB devices. Conguration options: [Disabled] [Enabled]
DTBT Controller 0 Configuration
Allows you to congure the DTBT Controller 0 Conguration options. For items without
a pop-up menu, you can either enter a number within the valid input range or use the
<+> or <-> to set the values.
DTBT Controller 0
Conguration options: [Disabled] [Enabled]
DTbt Root Port Type
Allows you to select the TBT Root Port Type.
Conguration options: [PCH Root Port] [PEG Root Port]
TBT Host Router
Allows you to enable the host router based on the ports available.
Conguration options: [One port [Two port]
Extra Bus Reserved
Conguration options: [0] – [255]
[56] One port Host.
[106] Two port Host.
Reserved Memory
Allows you to set the reserved memory specied in MB for the Root Bridge.
Conguration options: [1] – [4096]
Memory Alignment
This item is specied in bit. Conguration options: [0] – [31]
Reserved PMemory
Allows you to set the reserved prefetchable memory specied in MB for the Root
Bridge. Conguration options: [1] – [4096]
PMemory Alignment
This item is specied in bit. Conguration options: [0] – [31]
Reserved I/O
Conguration options: [0] – [60]
Thunderbolt(TM) OS select
Windows 10 Thunderbolt support
Conguration options: [Enable + RTD3] [Disabled]