User Manual
Table Of Contents
- 目录
- 1. 认识 BIOS 程序
- 2. BIOS 设置程序
- 3. 我的最爱(My Favorites)
- 4. 主菜单(Main Menu)
- 5. Ai Tweaker 菜单(Ai Tweaker menu)
- 6. 高级菜单(Advanced menu)
- 6.1 平台各项设置(Platform Misc Configuration)
- 6.2 处理器设置(CPU Configuration)
- 6.3 系统代理设置(System Agent Configuration)
- 6.4 PCH 设置(PCH Configuration)
- 6.5 PCH 存储设备设置(PCH Storage Configuration)
- 6.6 PCH-FW 设置(PCH-FW Configuration)
- 6.7 Thunderbolt(TM) 设置
- 6.8 PCI 子系统设置(PCI Subsystem Settings)
- 6.9 USB 设备设置(USB Configuration)
- 6.10 网络协定堆栈设置(Network Stack Configuration)
- 6.11 NVMe 设置(NVMe Configuration)
- 6.12 HDD/SSD SMART 信息
- 6.13 高级电源管理设置(APM Configuration)
- 6.14 内置设备设置(OnBoard Devices Configuration)
- 6.15 Intel® 快速保存技术(Intel(R) Rapid Storage Technology)
- 7. 监控菜单(Monitor menu)
- 8. 启动菜单(Boot menu)
- 9. 工具菜单(Tools menu)
- 10. 退出 BIOS 程序(Exit menu)
- 11. 更新 BIOS 程序(Updating BIOS)
PRIME / ProArt / TUF GAMING Intel 600 系列 BIOS 用戶手冊
25
DQ RTT PARK
設置值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM
Clock] [240 DRAM Clock]
DQ RTT PARK DQS
設置值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM
Clock] [240 DRAM Clock]
GroupA CA ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupA CS ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupA CK ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CA ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CS ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CK ODT
設置值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
Pull-up Output Driver Impedance
設置值:[34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
Pull-Down Output Driver Impedance
設置值:[34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
RTLIOLControl
Round Trip Latency Init Value MC0-1 CHA-B
設置值:[Auto] [0] - [255]
Round Trip Latency Max Value MC0-1 CHA-B
設置值:[Auto] [0] - [255]
Round Trip Latency Offset Value Mode Sign MC0-1 CHA-B
設置值:[-] [+]
Round Trip Latency Offset Value MC0-1 CHA-B
設置值:[Auto] [0] - [255]
DQ RTT NOM WR
設置值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM
Clock] [240 DRAM Clock]