User Manual

20
Pro WS W680-ACE Series BIOSガイド
DQ RTT PARK DQS
設定オプション: [Auto] [0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48 DRAM
Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM Clock] [240 DRAM Clock]
GroupA CA ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
GroupA CS ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
GroupA CK ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
GroupB CA ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
GroupB CS ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
GroupB CK ODT
設定オプション: [Auto] [0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80 DRAM
Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM Clock]
Pull-up Output Driver Impedance
設定オプション: [Auto] [34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
Pull-Down Output Driver Impedance
設定オプション: [Auto] [34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
RTL IOL Control
Round Trip Latency Init Value MC0-1 CHA-B
設定オプション: [Auto] [0] - [255]
Round Trip Latency Max Value MC0-1 CHA-B
設定オプション: [Auto] [0] - [255]
Round Trip Latency O󱐯set Value Mode Sign MC0-1 CHA-B
設定オプション: [-] [+]
Round Trip Latency O󱐯set Value MC0-1 CHA-B
設定オプション: [Auto] [0] - [255]
Round Trip Latency MC0-1 CHA-B R0-7
設定オプション: [Auto] [0] - [255]
Memory Training Algorithms
さまざまなメモリートレーニングアルゴリズムの有効/無効を設定します。
Early Command Training
設定オプション: [Auto] [Disabled] [Enabled]
SenseAmp O󱐯set Training
設定オプション: [Auto] [Disabled] [Enabled]
Early ReadMPR Timing Centering 2D
設定オプション: [Auto] [Disabled] [Enabled]