User Manual

ROG MAXIMUS XI CODE BIOS Manual
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1.6.1 Platform Misc Configuration
The items in this menu allow you to congure the platform-related features.
PCI Express Native Power Management
This item allows you to enhance the power saving feature of PCI Express and perform ASPM
operations in the operating system.
Conguration options: [Disabled] [Enabled]
The following item appears only when you set the PCI Express Native Power Management
to [Enabled].
Native ASPM
Conguration options: [Auto] [Enabled] [Disabled]
PCH - PCI Express
PCH DMI ASPM
This item allows you to control the Active State Power Management on both NB
(NorthBridge) side and SB (SouthBridge) side of the DMI Link.
Conguration options: [Disabled] [L0s] [L1] [L0sL1] [Auto]
ASPM 0
This item allows you to select the ASPM state for energy-saving conditions.
Conguration options: [Disabled] [L0s] [L1] [L0sL1] [Auto]
L1 Substates
This item allows you to select the PCI Express L1 Substates settings.
Conguration options: [L1.1] [L1.1 & L1.2]
PCI Express Clock Gating
This item allows you to enable or disable PCI Express Clock Gating for each port.
Conguration options: [Disabled] [Enabled]