User Manual
Table Of Contents
- 1. Knowing BIOS
- 2. BIOS setup program
- 3. My Favorites
- 4. Main menu
- 5. Extreme Tweaker menu
- 6. Advanced menu
- 6.1 Platform Misc Configuration
- 6.2 CPU Configuration
- 6.3 System Agent (SA) Configuration
- 6.4 PCH Configuration
- 6.5 PCH Storage Configuration
- 6.6 PCH-FW Configuration
- 6.7 Thunderbolt(TM) Configuration
- 6.8 PCI Subsystem Settings
- 6.9 USB Configuration
- 6.10 Network Stack Configuration
- 6.11 NVMe Configuration
- 6.12 Onboard Devices Configuration
- 6.13 APM Configuration
- 6.14 HDD/SSD SMART Information
- 7. Monitor menu
- 8. Boot menu
- 9. Tool menu
- 10. Exit menu
- 11. Updating BIOS
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ROG MAXIMUS XII FORMULA BIOS Manual
DRAM Command Rate
Configuration options: [Auto] [1N] [2N] [3N] [N:1]
The following item appears only when DRAM Command Rate is set to [N:1].
N to 1 ratio
Number of bubbles between wach valid command cycle.
Configurations: [4] - [7]
Secondary Timings
DRAM RAS# to RAS# Delay L
Configuration options: [Auto] [1] - [15]
DRAM RAS# to RAS# Delay S
Configuration options: [Auto] [1] - [15]
DRAM REF Cycle Time
Configuration options: [Auto] [1] - [1023]
DRAM REF Cycle Time 2
Configuration options: [Auto] [1] - [1023]
DRAM REF Cycle Time 4
Configuration options: [Auto] [1] - [1023]
DRAM Refresh Interval
Configuration options: [Auto] [1] - [65535]
DRAM WRITE Recovery Time
Configuration options: [Auto] [1] - [31]
DRAM READ to PRE Time
Configuration options: [Auto] [1] - [15]
DRAM FOUR ACT WIN Time
Configuration options: [Auto] [1] - [63]
DRAM WRITE to READ Delay
Configuration options: [Auto] [1] - [15]
DRAM WRITE to READ Delay L
Configuration options: [Auto] [1] - [15]
DRAM WRITE to READ Delay S
Configuration options: [Auto] [1] - [15]
DRAM CKE Minimum Pulse Width
Configuration options: [Auto] [0] - [15]
DRAM Write Latency
Configuration options: [Auto] [1] - [31]
Skew Control
ODT RTT WR (CHA)
Configuration options: [Auto] [0 DRAM CLOCK] [80 DRAM CLOCK] [120
DRAM CLOCK] [240 DRAM CLOCK] [255 DRAM CLOCK]