User Manual

ROG STRIX B450-F GAMING II BIOS Manual
61
The following items appear only when Aggressor Static Lane Control is set to
[Enabled].
Aggressor Static Lane Select Upper 32 bits
Static Lane Select for Upper 32 bits. The bit mask represents the bits to
be read.
Aggressor Static Lane Select Lower 32 bits
Static Lane Select for Lower 32 bits. The bit mask represents the bits to
be read.
Aggressor Static Lane Select ECC
Static Lane Select for ECC Lanes. The bit mask represents the bits to be
read.
Aggressor Static Lane Value
Target Static Lane Control
Configuration options: [Enabled] [Disabled]
The following items appear only when Target Static Lane Control is set to [Enabled].
Target Static Lane Select Upper 32 bits
Static Lane Select for Upper 32 bits. The bit mask represents the bits to
be read.
Target Static Lane Select Lower 32 bits
Static Lane Select for Lower 32 bits. The bit mask represents the bits to
be read.
Target Static Lane Select ECC
Target Static Lane Value
Worst Case Margin Granularity
Configuration options: [Per Chip Select] [Per Nibble]
Read Voltage Sweep Step Size
This option determines the step size for Read Data Eye voltage sweep.
Configuration options: [1] [2] [4]
Read Timing Sweep Step Size
This option determines the step size for Read Data Eye.
Configuration options: [1] [2] [4]
Write Voltage Sweep Step Size
This option determines the step size for Write Data Eye voltage sweep.
Configuration options: [1] [2] [4]
Write Timing Sweep Step Size
This option determines the step size for write Data Eye.
Configuration options: [1] [2] [4]