User Manual

ROG STRIX B760 Series BIOS Manual
19
Ctl1 ctlvrefup
Conguration options: [Auto] [0] – [255]
Ctl1 clkvrefup
Conguration options: [Auto] [0] – [255]
Ctl1 ckecsvrefup
Conguration options: [Auto] [0] – [255]
Ctl2 cmdvrefdn
Conguration options: [Auto] [0] – [255]
Ctl2 ctlvrefdn
Conguration options: [Auto] [0] – [255]
Ctl2 clkvrefdn
Conguration options: [Auto] [0] – [255]
ODT RTT WR (CHA) / ODT RTT WR (CHB)
Conguration options: [Auto] [0 DRAM Clock] [80 DRAM Clock]
[120 DRAM Clock] [240 DRAM Clock] [255 DRAM Clock]
ODT RTT PARK (CHA) / ODT RTT NOM (CHA) / ODT RTT PARK (CHB) /
ODT RTT NOM (CHB)
Conguration options: [Auto] [0 DRAM Clock] [34 DRAM Clock]
[40 DRAM Clock] [48 DRAM Clock] [60 DRAM Clock]
[80 DRAM Clock] [120 DRAM Clock] [240 DRAM Clock]
ODT_READ_DURATION / ODT_READ_DELAY / ODT_WRITE_DURATION /
ODT_WRITE_DELAY
Conguration options: [Auto] [0] – [7]
RTL IOL Control
Round Trip Latency Init Value MC0 CHA / Round Trip Latency Init Value
MC1 CHA
Conguration options: [Auto] [0] – [255]
Round Trip Latency Max Value MC0 CHA / Round Trip Latency Max Value
MC1 CHA
Conguration options: [Auto] [0] – [255]
Round Trip Latency Offset Value Mode Sign MC0 CHA / Round Trip
Latency Offset Value Mode Sign MC1 CHA
Conguration options: [-] [+]
Round Trip Latency Offset Value MC0 CHA / Round Trip Latency Offset
Value MC1 CHA
Conguration options: [Auto] [0] – [255]
Round Trip Latency MC0 CHA R0~R7 / Round Trip Latency MC1 CHA
R0~R7
Conguration options: [Auto] [0] – [255]
Memory Training Algorithms
Early Command Training
Conguration options: [Auto] [Disabled] [Enabled]