User Manual

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ROG STRIX Z690 SERIES BIOS Manual
The following item appears only when Negative Ratio Offset A is set to [User Specify].
Ratio Offset
Use the <+> and <-> keys to adjust the value.
Configuration options: [0] - [31]
Temperature B
Package passing this temperature threshold will engage the negative ratio offset
specified in Negative Ratio Offset B. Unit in Degree Celsius.
Configuration options: [Auto] [1] - [115]
Negative Ratio Offset A
This will be the potential negative offset to respective ratio when package temperature
rises above threshold specified in Temperature B.
Configuration options: [Auto] [User Specify]
The following item appears only when Negative Ratio Offset B is set to [User Specify].
Ratio Offset
Use the <+> and <-> keys to adjust the value.
Configuration options: [0] - [31]
V/F Point Offset
Offset Mode Sign 1-11
Configuration options: [+] [-]
V/F Point 1-11 Offset
Configuration options: [Auto] [0.001] - [0.999]
Tweaker’s Paradise
Realtime Memory Timing
Allows you to enable or disable realtime memory timing. When set to [Enabled], the
system will allow performing realtime memory timing changes after MRC_DONE.
Configuration options: [Disabled] [Enabled]
SPD Write Disable
Allows you to enable or disable setting SPD Write Disable. For security
recommendations, SPD write disable bit must be set.
Configuration options: [TRUE] [FALSE]
PVD Ratio Threshold
For the Core Domain PLL, the threshold to switch to lower post divider is 15 by
default. You can set a value lower than 15 when pushing high BCLK so that Digitally
Controlled Oscillator (DCO) remains at reasonable frequency.
Configuration options: [Auto] [1] - [40]
Banding Ratio
Use the <+> or <-> to adjust the value.
Configuration options: [Auto] [0] - [120]