User Manual

ROG STRIX Z690 SERIES BIOS Manual
53
Hardware Prefetcher
Allows you to enable or disable the MLC streamer prefetcher.
Configuration options: [Disabled] [Enabled]
Adjacent Cache Line Prefetch
Allows you to prefetch adjacent cache lines, reducing the DRAM loading time and improving
the system performance.
Configuration options: [Disabled] [Enabled]
Intel (VMX) Virtualization Technology
When set to [Enabled], VMX can utilize the additional hardware capabilities provided by
Vanderpool Technology.
Configuration options: [Disabled] [Enabled]
Active Performance Cores
Allows you to select the number of CPU cores to activate in each processor package.
Configuration options: [All] [1] - [7]
Active Efficient Cores
Allows you to select the number of Efficient cores to activate in each processor package.
Configuration options: [All] [0] - [3]
Number of Cores and Efficient Cores are looked at together. When both are {0,0}, Pcode
will enable all cores.
Active Processor Cores
Allows you to select the number of CPU cores to activate in each processor package.
Configuration options: [All] [1] - [5]
Hyper-Threading
Allows a hyper-threading processor to appear as two logical processors, allowing the
operating system to schedule two threads or processes simultaneously.
[Enabled] For two threads per activated core.
[Disabled] For only one thread per activated core.
Per Core Hyper-Threading
The items in this submenu allow you to enable or disable Hyper-Threading for each core.
Hyper-Threading of Core 0-7
Configuration options: [Disabled] [Enabled]
Total Memory Encryption
Allows you to configure the Total Memory Encryption (TME) to protect DRAM data from
physical attacks.
Configuration options: [Disabled] [Enabled]